Searched refs:DC_GPIO_PWRSEQ_MASK__DC_GPIO_DIGON_MASK__SHIFT (Results 1 - 9 of 9) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h3798 #define DC_GPIO_PWRSEQ_MASK__DC_GPIO_DIGON_MASK__SHIFT 0x00000008 macro
H A Ddce_8_0_sh_mask.h4052 #define DC_GPIO_PWRSEQ_MASK__DC_GPIO_DIGON_MASK__SHIFT 0x8 macro
H A Ddce_11_0_sh_mask.h4084 #define DC_GPIO_PWRSEQ_MASK__DC_GPIO_DIGON_MASK__SHIFT 0x8 macro
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H A Ddce_11_2_sh_mask.h4520 #define DC_GPIO_PWRSEQ_MASK__DC_GPIO_DIGON_MASK__SHIFT 0x8 macro
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H A Ddce_10_0_sh_mask.h3974 #define DC_GPIO_PWRSEQ_MASK__DC_GPIO_DIGON_MASK__SHIFT 0x8 macro
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H A Ddce_12_0_sh_mask.h10469 #define DC_GPIO_PWRSEQ_MASK__DC_GPIO_DIGON_MASK__SHIFT macro
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/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h41079 #define DC_GPIO_PWRSEQ_MASK__DC_GPIO_DIGON_MASK__SHIFT macro
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H A Ddcn_2_1_0_sh_mask.h43879 #define DC_GPIO_PWRSEQ_MASK__DC_GPIO_DIGON_MASK__SHIFT macro
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H A Ddcn_2_0_0_sh_mask.h49426 #define DC_GPIO_PWRSEQ_MASK__DC_GPIO_DIGON_MASK__SHIFT macro
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