Searched refs:DCR_EBC0_CFGADDR (Results 1 - 2 of 2) sorted by relevance

/netbsd-current/sys/arch/powerpc/ibm4xx/dev/
H A Dexb.c80 case 0: mtdcr(DCR_EBC0_CFGADDR, DCR_EBC0_B0CR); break;
81 case 1: mtdcr(DCR_EBC0_CFGADDR, DCR_EBC0_B1CR); break;
82 case 2: mtdcr(DCR_EBC0_CFGADDR, DCR_EBC0_B2CR); break;
83 case 3: mtdcr(DCR_EBC0_CFGADDR, DCR_EBC0_B3CR); break;
84 case 4: mtdcr(DCR_EBC0_CFGADDR, DCR_EBC0_B4CR); break;
85 case 5: mtdcr(DCR_EBC0_CFGADDR, DCR_EBC0_B5CR); break;
86 case 6: mtdcr(DCR_EBC0_CFGADDR, DCR_EBC0_B6CR); break;
87 case 7: mtdcr(DCR_EBC0_CFGADDR, DCR_EBC0_B7CR); break;
/netbsd-current/sys/arch/powerpc/include/ibm4xx/
H A Ddcr4xx.h50 #define DCR_EBC0_CFGADDR 0x012 /* Peripheral Controller Address Register */ macro

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