Searched refs:DCR_CPC0_CR1 (Results 1 - 6 of 6) sorted by relevance

/netbsd-current/sys/arch/evbppc/obs405/
H A Dobs200_autoconf.c58 mtdcr(DCR_CPC0_CR1, mfdcr(DCR_CPC0_CR1) & ~CPC0_CR1_CETE);
H A Dobs266_autoconf.c58 mtdcr(DCR_CPC0_CR1, mfdcr(DCR_CPC0_CR1) & ~CPC0_CR1_CETE);
H A Dobs600_autoconf.c103 mtdcr(DCR_CPC0_CR1, mfdcr(DCR_CPC0_CR1) & ~CPC0_CR1_CETE);
/netbsd-current/sys/arch/evbppc/walnut/
H A Dautoconf.c69 mtdcr(DCR_CPC0_CR1, mfdcr(DCR_CPC0_CR1) & ~CPC0_CR1_CETE);
/netbsd-current/sys/arch/evbppc/dht/
H A Dautoconf.c66 mtdcr(DCR_CPC0_CR1, mfdcr(DCR_CPC0_CR1) & ~CPC0_CR1_CETE);
/netbsd-current/sys/arch/powerpc/include/ibm4xx/
H A Ddcr4xx.h74 #define DCR_CPC0_CR1 0x0b2 /* Chip Control Register 1 */ macro

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