Searched refs:CR_RST (Results 1 - 8 of 8) sorted by relevance
/netbsd-current/sys/arch/sandpoint/stand/altboot/ |
H A D | sip.c | 64 #define CR_RST (1U << 8) /* software reset */ macro 152 CSR_WRITE(l, SIP_CR, CR_RST); 155 } while (val & CR_RST); /* S1C */
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/netbsd-current/sys/arch/mac68k/obio/ |
H A D | if_sn_obio.c | 204 CSR_WRITE(sc, SONIC_CR, CR_RST);
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/netbsd-current/sys/dev/ic/ |
H A D | dp83932reg.h | 171 #define CR_RST (1U << 7) /* Software Reset */ macro
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H A D | dp83932.c | 878 CSR_WRITE(sc, SONIC_CR, CR_RST); 921 CSR_WRITE(sc, SONIC_CR, CR_RST);
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/netbsd-current/sys/arch/newsmips/apbus/ |
H A D | if_sn.c | 122 NIC_PUT(sc, SNR_CR, CR_RST); 376 NIC_PUT(sc, SNR_CR, CR_RST); /* DCR only accessible in reset mode! */ 448 NIC_PUT(sc, SNR_CR, CR_RST); 700 NIC_PUT(sc, SNR_CR, CR_RST);
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H A D | if_snreg.h | 89 * With the exception of CR_RST, the bit is reset when the operation 94 #define CR_RST 0x0080 /* software reset */ macro 105 * reset mode (s_cr.CR_RST is set.)
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/netbsd-current/sys/dev/pci/ |
H A D | if_sipreg.h | 210 #define CR_RST 0x00000100 /* software reset */ macro
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H A D | if_sip.c | 2528 bus_space_write_4(st, sh, SIP_CR, CR_RST); 2531 if ((bus_space_read_4(st, sh, SIP_CR) & CR_RST) == 0)
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