Searched refs:CM1_CM_ICSC_B_C33_C34__CM_ICSC_B_C33__SHIFT (Results 1 - 2 of 2) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_1_0_sh_mask.h15070 #define CM1_CM_ICSC_B_C33_C34__CM_ICSC_B_C33__SHIFT macro
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H A Ddcn_2_0_0_sh_mask.h18138 #define CM1_CM_ICSC_B_C33_C34__CM_ICSC_B_C33__SHIFT macro
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