/netbsd-current/external/gpl3/gdb.old/dist/sim/m68hc11/ |
H A D | gencode.c | 49 #define CHG_NZVC 0,0,M6811_NZVC_BIT macro 364 { "asld", "d->d", "lsl16", 1, 0x05, 3, 3, CHG_NZVC }, 375 { "sba", "b,a->a", "sub8", 1, 0x10, 2, 2, CHG_NZVC }, 376 { "cba", "b,a", "sub8", 1, 0x11, 2, 2, CHG_NZVC }, 387 { "daa", "", "daa8", 1, 0x19, 2, 2, CHG_NZVC }, 428 { "nega", "a->a", "neg8", 1, 0x40, 2, 2, CHG_NZVC }, 432 { "rora", "a->a", "ror8", 1, 0x46, 2, 2, CHG_NZVC }, 433 { "asra", "a->a", "asr8", 1, 0x47, 2, 2, CHG_NZVC }, 434 { "asla", "a->a", "lsl8", 1, 0x48, 2, 2, CHG_NZVC }, 435 { "rola", "a->a", "rol8", 1, 0x49, 2, 2, CHG_NZVC }, [all...] |
/netbsd-current/external/gpl3/gdb/dist/sim/m68hc11/ |
H A D | gencode.c | 52 #define CHG_NZVC 0,0,M6811_NZVC_BIT macro 367 { "asld", "d->d", "lsl16", 1, 0x05, 3, 3, CHG_NZVC }, 378 { "sba", "b,a->a", "sub8", 1, 0x10, 2, 2, CHG_NZVC }, 379 { "cba", "b,a", "sub8", 1, 0x11, 2, 2, CHG_NZVC }, 390 { "daa", "", "daa8", 1, 0x19, 2, 2, CHG_NZVC }, 431 { "nega", "a->a", "neg8", 1, 0x40, 2, 2, CHG_NZVC }, 435 { "rora", "a->a", "ror8", 1, 0x46, 2, 2, CHG_NZVC }, 436 { "asra", "a->a", "asr8", 1, 0x47, 2, 2, CHG_NZVC }, 437 { "asla", "a->a", "lsl8", 1, 0x48, 2, 2, CHG_NZVC }, 438 { "rola", "a->a", "rol8", 1, 0x49, 2, 2, CHG_NZVC }, [all...] |
/netbsd-current/external/gpl3/binutils/dist/opcodes/ |
H A D | m68hc11-opc.c | 49 #define CHG_NZVC 0,0,M6811_NZVC_BIT macro 165 { "addd", OP_IMM16, 3, 0xc3, 2, 2, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 }, 166 { "addd", OP_DIRECT, 2, 0xd3, 3, 3, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 }, 167 { "addd", OP_IND16, 3, 0xf3, 3, 3, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 }, 168 { "addd", OP_IX, 2, 0xe3, 6, 6, CHG_NZVC, cpu6811, 0 }, 169 { "addd", OP_IY | OP_PAGE2, 3, 0xe3, 7, 7, CHG_NZVC, cpu6811, 0 }, 170 { "addd", OP_IDX, 2, 0xe3, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 }, 171 { "addd", OP_IDX_1, 3, 0xe3, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 }, 172 { "addd", OP_IDX_2, 4, 0xe3, 4, 4, CHG_NZVC, cpu6812|cpu9s12x, 0 }, 173 { "addd", OP_D_IDX, 2, 0xe3, 6, 6, CHG_NZVC, cpu681 [all...] |
H A D | xgate-opc.c | 50 #define CHG_NZVC 0,0,(XGATE_NZVC_BIT) macro 105 { "adc", OP_TRI, "00011rrrrrrrrr11", 2, 0x1803, 1, 1, CHG_NZVC, ALL}, 106 { "add", OP_TRI, "00011rrrrrrrrr10", 2, 0x1802, 1, 1, CHG_NZVC, ALL}, 107 { "addh", OP_IMM8, "11101rrriiiiiiii", 2, 0xE800, 1, 1, CHG_NZVC, ALL}, 108 { "addl", OP_IMM8, "11100rrriiiiiiii", 2, 0xE000, 1, 1, CHG_NZVC, ALL}, 112 { "asr", OP_IMM4, "00001rrriiii1001", 2, 0x0809, 1, 1, CHG_NZVC, ALL}, 113 { "asr", OP_DYA, "00001rrrrrr10001", 2, 0x0811, 1, 1, CHG_NZVC, ALL}, 118 { "bffo", OP_DYA, "00001rrrrrr10000", 2, 0x0810, 1, 1, CHG_NZVC, ALL}, 137 { "cmpl", OP_IMM8, "11010rrriiiiiiii", 2, 0xD000, 1, 1, CHG_NZVC, ALL}, 138 { "cpch", OP_IMM8, "11011rrriiiiiiii", 2, 0xD800, 1, 1, CHG_NZVC, AL [all...] |
/netbsd-current/external/gpl3/gdb.old/dist/opcodes/ |
H A D | m68hc11-opc.c | 49 #define CHG_NZVC 0,0,M6811_NZVC_BIT macro 165 { "addd", OP_IMM16, 3, 0xc3, 2, 2, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 }, 166 { "addd", OP_DIRECT, 2, 0xd3, 3, 3, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 }, 167 { "addd", OP_IND16, 3, 0xf3, 3, 3, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 }, 168 { "addd", OP_IX, 2, 0xe3, 6, 6, CHG_NZVC, cpu6811, 0 }, 169 { "addd", OP_IY | OP_PAGE2, 3, 0xe3, 7, 7, CHG_NZVC, cpu6811, 0 }, 170 { "addd", OP_IDX, 2, 0xe3, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 }, 171 { "addd", OP_IDX_1, 3, 0xe3, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 }, 172 { "addd", OP_IDX_2, 4, 0xe3, 4, 4, CHG_NZVC, cpu6812|cpu9s12x, 0 }, 173 { "addd", OP_D_IDX, 2, 0xe3, 6, 6, CHG_NZVC, cpu681 [all...] |
H A D | xgate-opc.c | 50 #define CHG_NZVC 0,0,(XGATE_NZVC_BIT) macro 105 { "adc", OP_TRI, "00011rrrrrrrrr11", 2, 0x1803, 1, 1, CHG_NZVC, ALL}, 106 { "add", OP_TRI, "00011rrrrrrrrr10", 2, 0x1802, 1, 1, CHG_NZVC, ALL}, 107 { "addh", OP_IMM8, "11101rrriiiiiiii", 2, 0xE800, 1, 1, CHG_NZVC, ALL}, 108 { "addl", OP_IMM8, "11100rrriiiiiiii", 2, 0xE000, 1, 1, CHG_NZVC, ALL}, 112 { "asr", OP_IMM4, "00001rrriiii1001", 2, 0x0809, 1, 1, CHG_NZVC, ALL}, 113 { "asr", OP_DYA, "00001rrrrrr10001", 2, 0x0811, 1, 1, CHG_NZVC, ALL}, 118 { "bffo", OP_DYA, "00001rrrrrr10000", 2, 0x0810, 1, 1, CHG_NZVC, ALL}, 137 { "cmpl", OP_IMM8, "11010rrriiiiiiii", 2, 0xD000, 1, 1, CHG_NZVC, ALL}, 138 { "cpch", OP_IMM8, "11011rrriiiiiiii", 2, 0xD800, 1, 1, CHG_NZVC, AL [all...] |
/netbsd-current/external/gpl3/gdb/dist/opcodes/ |
H A D | m68hc11-opc.c | 49 #define CHG_NZVC 0,0,M6811_NZVC_BIT macro 165 { "addd", OP_IMM16, 3, 0xc3, 2, 2, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 }, 166 { "addd", OP_DIRECT, 2, 0xd3, 3, 3, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 }, 167 { "addd", OP_IND16, 3, 0xf3, 3, 3, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 }, 168 { "addd", OP_IX, 2, 0xe3, 6, 6, CHG_NZVC, cpu6811, 0 }, 169 { "addd", OP_IY | OP_PAGE2, 3, 0xe3, 7, 7, CHG_NZVC, cpu6811, 0 }, 170 { "addd", OP_IDX, 2, 0xe3, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 }, 171 { "addd", OP_IDX_1, 3, 0xe3, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 }, 172 { "addd", OP_IDX_2, 4, 0xe3, 4, 4, CHG_NZVC, cpu6812|cpu9s12x, 0 }, 173 { "addd", OP_D_IDX, 2, 0xe3, 6, 6, CHG_NZVC, cpu681 [all...] |
H A D | xgate-opc.c | 50 #define CHG_NZVC 0,0,(XGATE_NZVC_BIT) macro 105 { "adc", OP_TRI, "00011rrrrrrrrr11", 2, 0x1803, 1, 1, CHG_NZVC, ALL}, 106 { "add", OP_TRI, "00011rrrrrrrrr10", 2, 0x1802, 1, 1, CHG_NZVC, ALL}, 107 { "addh", OP_IMM8, "11101rrriiiiiiii", 2, 0xE800, 1, 1, CHG_NZVC, ALL}, 108 { "addl", OP_IMM8, "11100rrriiiiiiii", 2, 0xE000, 1, 1, CHG_NZVC, ALL}, 112 { "asr", OP_IMM4, "00001rrriiii1001", 2, 0x0809, 1, 1, CHG_NZVC, ALL}, 113 { "asr", OP_DYA, "00001rrrrrr10001", 2, 0x0811, 1, 1, CHG_NZVC, ALL}, 118 { "bffo", OP_DYA, "00001rrrrrr10000", 2, 0x0810, 1, 1, CHG_NZVC, ALL}, 137 { "cmpl", OP_IMM8, "11010rrriiiiiiii", 2, 0xD000, 1, 1, CHG_NZVC, ALL}, 138 { "cpch", OP_IMM8, "11011rrriiiiiiii", 2, 0xD800, 1, 1, CHG_NZVC, AL [all...] |
/netbsd-current/external/gpl3/binutils.old/dist/opcodes/ |
H A D | m68hc11-opc.c | 49 #define CHG_NZVC 0,0,M6811_NZVC_BIT macro 165 { "addd", OP_IMM16, 3, 0xc3, 2, 2, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 }, 166 { "addd", OP_DIRECT, 2, 0xd3, 3, 3, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 }, 167 { "addd", OP_IND16, 3, 0xf3, 3, 3, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 }, 168 { "addd", OP_IX, 2, 0xe3, 6, 6, CHG_NZVC, cpu6811, 0 }, 169 { "addd", OP_IY | OP_PAGE2, 3, 0xe3, 7, 7, CHG_NZVC, cpu6811, 0 }, 170 { "addd", OP_IDX, 2, 0xe3, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 }, 171 { "addd", OP_IDX_1, 3, 0xe3, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 }, 172 { "addd", OP_IDX_2, 4, 0xe3, 4, 4, CHG_NZVC, cpu6812|cpu9s12x, 0 }, 173 { "addd", OP_D_IDX, 2, 0xe3, 6, 6, CHG_NZVC, cpu681 [all...] |
H A D | xgate-opc.c | 50 #define CHG_NZVC 0,0,(XGATE_NZVC_BIT) macro 105 { "adc", OP_TRI, "00011rrrrrrrrr11", 2, 0x1803, 1, 1, CHG_NZVC, ALL}, 106 { "add", OP_TRI, "00011rrrrrrrrr10", 2, 0x1802, 1, 1, CHG_NZVC, ALL}, 107 { "addh", OP_IMM8, "11101rrriiiiiiii", 2, 0xE800, 1, 1, CHG_NZVC, ALL}, 108 { "addl", OP_IMM8, "11100rrriiiiiiii", 2, 0xE000, 1, 1, CHG_NZVC, ALL}, 112 { "asr", OP_IMM4, "00001rrriiii1001", 2, 0x0809, 1, 1, CHG_NZVC, ALL}, 113 { "asr", OP_DYA, "00001rrrrrr10001", 2, 0x0811, 1, 1, CHG_NZVC, ALL}, 118 { "bffo", OP_DYA, "00001rrrrrr10000", 2, 0x0810, 1, 1, CHG_NZVC, ALL}, 137 { "cmpl", OP_IMM8, "11010rrriiiiiiii", 2, 0xD000, 1, 1, CHG_NZVC, ALL}, 138 { "cpch", OP_IMM8, "11011rrriiiiiiii", 2, 0xD800, 1, 1, CHG_NZVC, AL [all...] |