Searched refs:AZF0ENDPOINT2_AZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO6__DESCRIPTION11__SHIFT (Results 1 - 4 of 4) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h49370 #define AZF0ENDPOINT2_AZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO6__DESCRIPTION11__SHIFT macro
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H A Ddcn_2_1_0_sh_mask.h51664 #define AZF0ENDPOINT2_AZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO6__DESCRIPTION11__SHIFT macro
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H A Ddcn_2_0_0_sh_mask.h63057 #define AZF0ENDPOINT2_AZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO6__DESCRIPTION11__SHIFT macro
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/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_sh_mask.h58442 #define AZF0ENDPOINT2_AZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO6__DESCRIPTION11__SHIFT macro
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