Searched refs:AR_IMR_S3 (Results 1 - 3 of 3) sorted by relevance

/netbsd-current/sys/external/isc/atheros_hal/dist/ar5211/
H A Dar5211reg.h59 #define AR_IMR_S3 0x00b0 /* Secondary interrupt mask reg 3 */ macro
/netbsd-current/sys/external/isc/atheros_hal/dist/ar5212/
H A Dar5212reg.h56 #define AR_IMR_S3 0x00b0 /* MAC Secondary interrupt mask register 3 */ macro
/netbsd-current/sys/dev/ic/
H A Dathnreg.h61 #define AR_IMR_S3 0x00b0 macro
523 /* Bits for AR_IMR_S3. */

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