Searched refs:AR_GPIOCR_INT_SEL0 (Results 1 - 2 of 2) sorted by relevance

/netbsd-current/sys/external/isc/atheros_hal/dist/ar5211/
H A Dar5211_misc.c269 val &= ~(AR_GPIOCR_INT_SEL0 | AR_GPIOCR_INT_SELH | AR_GPIOCR_INT_ENA |
272 val |= AR_GPIOCR_INT_SEL0 | AR_GPIOCR_INT_ENA;
H A Dar5211reg.h688 #define AR_GPIOCR_INT_SEL0 0x00000000 /* Select Interrupt Pin GPIO_0 */ macro

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