Searched refs:AR7100_CPU_PLL_DDR_DIV_SEL (Results 1 - 2 of 2) sorted by relevance

/netbsd-current/sys/arch/mips/atheros/
H A Dar7100.c162 pll_freq / (__SHIFTOUT(pll, AR7100_CPU_PLL_DDR_DIV_SEL) + 1);
/netbsd-current/sys/arch/mips/atheros/include/
H A Dar9344reg.h101 #define AR7100_CPU_PLL_DDR_DIV_SEL __BITS(19,18) macro

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