/netbsd-6-1-5-RELEASE/sys/arch/amiga/dev/ |
H A D | grf_etreg.h | 86 #define vgaw(ba, reg, val) \ macro 266 do { vgaw(ba, GCT_ADDRESS, idx); vgaw(ba, GCT_ADDRESS_W , val); } while (0) 269 do { vgaw(ba, SEQ_ADDRESS, idx); vgaw(ba, SEQ_ADDRESS_W , val); } while (0) 272 do { vgaw(ba, CRT_ADDRESS, idx); vgaw(ba, CRT_ADDRESS_W , val); } while (0) 275 do { vgaw(ba, IMA_ADDRESS, idx); vgaw(ba, IMA_ADDRESS_W , val); } while (0) 280 vgaw(b [all...] |
H A D | grf_et.c | 394 vgaw(ba, MERLIN_SWITCH_REG, 0); 396 vgaw(ba, MERLIN_SWITCH_REG, 8); 398 vgaw(ba, MERLIN_SWITCH_REG, 0); 400 vgaw(ba, MERLIN_VDAC_DATA, 1); 402 vgaw(ba, MERLIN_VDAC_INDEX, 0x00); 403 vgaw(ba, MERLIN_VDAC_SPRITE, 0xff); 404 vgaw(ba, MERLIN_VDAC_INDEX, 0x01); 405 vgaw(ba, MERLIN_VDAC_SPRITE, 0x0f); 406 vgaw(ba, MERLIN_VDAC_INDEX, 0x02); 407 vgaw(b [all...] |
H A D | grf_rtreg.h | 316 #define vgaw(ba, reg, val) \ macro 491 do { vgaw(ba, GCT_ADDRESS, idx); vgaw(ba, GCT_ADDRESS_W , val); } while (0) 494 do { vgaw(ba, SEQ_ADDRESS, idx); vgaw(ba, SEQ_ADDRESS_W , val); } while (0) 497 do { vgaw(ba, CRT_ADDRESS, idx); vgaw(ba, CRT_ADDRESS_W , val); } while (0) 500 do { vgaw(ba, ACT_ADDRESS, idx); vgaw(ba, ACT_ADDRESS_W, val); } while (0) 506 vgaw (b [all...] |
H A D | grf_cvreg.h | 66 #define vgaw(ba, reg, val) \ macro 345 do { vgaw(ba, GCT_ADDRESS, idx); vgaw(ba, GCT_ADDRESS_W , val); } while (0) 348 do { vgaw(ba, SEQ_ADDRESS, idx); vgaw(ba, SEQ_ADDRESS_W , val); } while (0) 351 do { vgaw(ba, CRT_ADDRESS, idx); vgaw(ba, CRT_ADDRESS_W , val); } while (0) 357 vgaw(ba, ACT_ADDRESS_W, idx);\ 358 vgaw(ba, ACT_ADDRESS_W, val);\ 405 vgaw(b [all...] |
H A D | grf_rhreg.h | 426 #define vgaw(ba, reg, val) \ macro 635 do { vgaw(ba, GCT_ADDRESS, idx); vgaw(ba, GCT_ADDRESS_W , val); } while (0) 638 do { vgaw(ba, SEQ_ADDRESS, idx); vgaw(ba, SEQ_ADDRESS_W , val); } while (0) 641 do { vgaw(ba, CRT_ADDRESS, idx); vgaw(ba, CRT_ADDRESS_W , val); } while (0) 644 do { vgaw(ba, ACT_ADDRESS, idx); vgaw(ba, ACT_ADDRESS_W, val); } while (0) 650 do { vgaw(b [all...] |
H A D | grf_clreg.h | 74 #define vgaw(ba, reg, val) \ macro 275 vgaw(ba, GCT_ADDRESS, idx); \ 276 vgaw(ba, GCT_ADDRESS_W , val); \ 281 vgaw(ba, SEQ_ADDRESS, idx); \ 282 vgaw(ba, SEQ_ADDRESS_W , val); \ 289 vgaw(ba, CRT_ADDRESS, idx); \ 290 vgaw(ba, CRT_ADDRESS_W , val); \ 296 vgaw(ba, ACT_ADDRESS_W, idx); \ 297 vgaw(ba, ACT_ADDRESS_W, val); \
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H A D | grf_cl.c | 409 vgaw(gp->g_regkva, CRT_ADDRESS, 0x27); /* Chip ID */ 478 vgaw(ba, 0x46e8, 0x16); 479 vgaw(ba, 0x102, 1); 480 vgaw(ba, 0x46e8, 0x0e); 482 vgaw(ba, 0x3c3, 1); 489 vgaw(ba, GREG_MISC_OUTPUT_W, 0xed); /* mem disable */ 555 vgaw(ba, VDAC_MASK, 0xff); 556 vgaw(ba, GREG_MISC_OUTPUT_W, 0xef); 563 vgaw(ba, VDAC_ADDRESS_W, 0); 565 vgaw(b [all...] |
H A D | grf_rt.c | 362 vgaw (ba, GREG_MISC_OUTPUT_W, 0xe3 | ((clksel & 3) * 0x04)); 363 vgaw (ba, GREG_FEATURE_CONTROL_W, 0x00); 387 vgaw (ba, GREG_MISC_OUTPUT_W, 0xe3 | ((clksel & 3) * 0x04)); 388 vgaw (ba, GREG_FEATURE_CONTROL_W, 0x00); 571 vgaw (ba, ACT_ADDRESS_W, 0x20); 587 vgaw (ba, VDAC_REG_D, 0x02); 593 vgaw (ba, VDAC_REG_SELECT, 0x00); 601 vgaw (ba, VDAC_REG_DATA, *col++); 602 vgaw (ba, VDAC_REG_DATA, *col++); 603 vgaw (b [all...] |
H A D | grf_cv3dreg.h | 63 #define vgaw(ba, reg, val) \ macro 535 do { vgaw(ba, GCT_ADDRESS, idx); vgaw(ba, GCT_ADDRESS_W , val); } while (0) 538 do { vgaw(ba, SEQ_ADDRESS, idx); vgaw(ba, SEQ_ADDRESS_W , val); } while (0) 541 do { vgaw(ba, CRT_ADDRESS, idx); vgaw(ba, CRT_ADDRESS_W , val); } while (0) 547 vgaw(ba, ACT_ADDRESS_W, idx);\ 548 vgaw(ba, ACT_ADDRESS_W, val);\ 597 vgaw(b [all...] |
H A D | grf_rh.c | 553 vgaw(ba, VDAC_ADDRESS_W, firstcol); 561 vgaw(ba, VDAC_DATA, (*col++ >> 2)); 562 vgaw(ba, VDAC_DATA, (*col++ >> 2)); 563 vgaw(ba, VDAC_DATA, (*col++ >> 2)); 576 vgaw(ba, VDAC_ADDRESS_W, colornum); 578 vgaw(ba, VDAC_DATA, (red >> 2)); 579 vgaw(ba, VDAC_DATA, (green >> 2)); 580 vgaw(ba, VDAC_DATA, (blue >> 2)); 601 vgaw(ba, ACT_ADDRESS_W, 0x20); 821 vgaw(b [all...] |
H A D | grf_cv.c | 373 vgaw(ba, CRT_ADDRESS, CRT_ID_END_VER_RETR); 398 vgaw(ba, CRT_ADDRESS, cridx); 644 vgaw(ba, SREG_VIDEO_SUBS_ENABLE, 0x10); 645 vgaw(ba, SREG_OPTION_SELECT, 0x01); 646 vgaw(ba, SREG_VIDEO_SUBS_ENABLE, 0x08); 648 vgaw(ba, GREG_MISC_OUTPUT_W, 0x03); 674 vgaw(ba, ECR_ADV_FUNC_CNTL, 0x31); 677 vgaw(ba, GREG_MISC_OUTPUT_W, 0xe3); 736 vgaw(ba, 0x3c2, test); 818 vgaw(b [all...] |
H A D | grf_cv3d.c | 602 vgaw(ba, SREG_VIDEO_SUBS_ENABLE, 0x01); 604 vgaw(ba, GREG_MISC_OUTPUT_W, 0x03); 621 vgaw(ba, GREG_MISC_OUTPUT_W, 0xC3); 680 vgaw(ba, 0x3c2, test); 1324 vgaw(ba, GREG_MISC_OUTPUT_W, hvsync_pulse);
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/netbsd-6-1-5-RELEASE/sys/arch/atari/dev/ |
H A D | grf_etreg.h | 50 #define vgaw(ba, reg, val) *(((volatile u_char *)ba)+reg) = ((u_char)val) macro 188 vgaw(ba, GCT_ADDRESS, idx); \ 189 vgaw(ba, GCT_ADDRESS_W , val); \ 194 vgaw(ba, SEQ_ADDRESS, idx); \ 195 vgaw(ba, SEQ_ADDRESS_W , val); \ 200 vgaw(ba, CRT_ADDRESS, idx); \ 201 vgaw(ba, CRT_ADDRESS_W , val); \ 206 vgaw(ba, IMA_ADDRESS, idx); \ 207 vgaw(ba, IMA_ADDRESS_W , val); \ 214 vgaw(b [all...] |
H A D | grfabs_et.c | 444 vgaw(ba, GREG_HERCULESCOMPAT, 0x03); 445 vgaw(ba, GREG_DISPMODECONTROL, 0xa0); 607 vgaw(ba, VDAC_MASK, 0); /* set to palette */ 610 vgaw(ba, VDAC_MASK, 0xff); 685 vgaw(ba, GREG_SEGMENTSELECT, 0); 686 vgaw(ba, GREG_MISC_OUTPUT_W, et_regs->misc_output); 717 vgaw(ba, GREG_SEGMENTSELECT, et_regs->seg_sel);
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H A D | ite_et.c | 590 vgaw(ba, VDAC_ADDRESS_W, 0); 594 vgaw(ba, VDAC_DATA, etconscolors[y][0]); 595 vgaw(ba, VDAC_DATA, etconscolors[y][1]); 596 vgaw(ba, VDAC_DATA, etconscolors[y][2]);
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/netbsd-6-1-5-RELEASE/sys/arch/atari/pci/ |
H A D | pci_tseng.c | 111 vgaw(ba, GREG_MISC_OUTPUT_W, 0x63); 112 vgaw(ba, GREG_VIDEOSYSENABLE, 0x01); 115 vgaw(ba, VDAC_MASK , 0xff); 117 vgaw(ba, GREG_HERCULESCOMPAT, 0x03); 118 vgaw(ba, GREG_DISPMODECONTROL, 0xa0); 130 vgaw(ba, VDAC_MASK, 0); /* set to palette */ 132 vgaw(ba, VDAC_MASK, 0xff);
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H A D | pci_vga.c | 176 vgaw(regs, VDAC_ADDRESS_W, 0); 179 vgaw(regs, VDAC_DATA, conscolors[j][0]); 180 vgaw(regs, VDAC_DATA, conscolors[j][1]); 181 vgaw(regs, VDAC_DATA, conscolors[j][2]);
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