/netbsd-6-1-5-RELEASE/external/gpl3/gcc/dist/gcc/config/mips/ |
H A D | linux-unwind.h | 51 _Unwind_Ptr new_cfa, reg_offset; local 95 reg_offset = 4; 97 reg_offset = 0; 103 = (_Unwind_Ptr)&(sc->sc_regs[i]) + reg_offset - new_cfa;
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/netbsd-6-1-5-RELEASE/external/gpl3/gdb/dist/gdb/ |
H A D | hppanbsd-tdep.c | 124 int *reg_offset; local 128 reg_offset = hppanbsd_mc_reg_offset; 139 if (reg_offset[i] != -1) 140 trad_frame_set_reg_addr (this_cache, i, base + reg_offset[i]);
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H A D | bfin-linux-tdep.c | 108 const int *reg_offset = bfin_linux_sigcontext_reg_offset; local 112 if (reg_offset[i] != -1) 113 trad_frame_set_reg_addr (this_cache, i, sigcontext + reg_offset[i]);
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H A D | amd64-nat.c | 58 int *reg_offset = amd64_native_gregset64_reg_offset; local 65 reg_offset = amd64_native_gregset32_reg_offset; 73 return reg_offset[regnum];
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H A D | shnbsd-tdep.c | 180 const int *reg_offset; 184 reg_offset = shnbsd_mc_reg_offset; 192 if (reg_offset[i] != -1) 193 trad_frame_set_reg_addr (this_cache, i, base + reg_offset[i]); 179 const int *reg_offset; local
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H A D | i386nbsd-tdep.c | 245 int *reg_offset; local 251 reg_offset = i386nbsd_sc_reg_offset; 259 reg_offset = i386nbsd_mc_reg_offset; 269 if (reg_offset[i] != -1) 270 trad_frame_set_reg_addr (this_cache, i, base + reg_offset[i]);
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H A D | i386gnu-nat.c | 51 static int reg_offset[] = variable 59 #define REG_ADDR(state, regnum) ((char *)(state) + reg_offset[regnum]) 60 #define CREG_ADDR(state, regnum) ((const char *)(state) + reg_offset[regnum])
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H A D | rx-tdep.c | 88 /* reg_offset[R] is the offset from the CFA at which register R is 91 int reg_offset[RX_NUM_REGS]; member in struct:rx_prologue 158 result->reg_offset[value.reg] = addr.k; 207 result->reg_offset[rn] = 1; 446 else if (p->reg_offset[regnum] != 1) 448 frame_base + p->reg_offset[regnum]);
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/netbsd-6-1-5-RELEASE/sys/dev/isa/ |
H A D | nca_isa.c | 124 nca_isa_test(bus_space_tag_t iot, bus_space_handle_t ioh, bus_size_t reg_offset) argument 128 bus_space_write_1(iot, ioh, reg_offset + C80_ICR, SCI_ICMD_RST); 129 bus_space_write_1(iot, ioh, reg_offset + C80_ODR, 0); 133 if (bus_space_read_1(iot, ioh, reg_offset + C80_CSBR) != SCI_BUS_RST) { 136 __func__, bus_space_read_1(iot, ioh, reg_offset+C80_CSBR)); 138 bus_space_write_1(iot, ioh, reg_offset+C80_ICR, 0); 142 bus_space_write_1(iot, ioh, reg_offset + C80_ICR, 0); 147 bus_space_read_1(iot, ioh, reg_offset + C80_RPIR); 151 if (bus_space_read_1(iot, ioh, reg_offset + C80_BSR) & (SCI_CSR_PERR | 155 __func__, bus_space_read_1(iot, ioh, reg_offset 180 bus_size_t base_offset, reg_offset = 0; local [all...] |
/netbsd-6-1-5-RELEASE/external/gpl3/gdb/dist/sim/mips/ |
H A D | dv-tx3904tmr.c | 334 int reg_offset = 3 - (address - controller->base_address) % 4; local 353 memcpy ((char*) dest + byte, ((char*)& register_value)+reg_offset, 1); 377 int reg_offset = 3 - (address - controller->base_address) % 4; local 383 if(reg_offset == 0) /* first byte */ 397 if(reg_offset == 1) /* second byte */ 401 else if(reg_offset == 0) /* first byte */ 409 if(reg_offset == 0) /* first byte */ 417 if(reg_offset == 1) /* second byte */ 422 else if(reg_offset == 0) /* first byte */ 430 if(reg_offset [all...] |
H A D | dv-tx3904sio.c | 329 int reg_offset = (address - controller->base_address) % 4; local 344 if(reg_offset == 0 && tx3904sio_fifo_nonempty(me, & controller->rx_fifo)) 354 /* HW_TRACE ((me, "byte %d %02x", reg_offset, ((char*)& register_value)[reg_offset])); */ 355 memcpy ((char*) dest + byte, ((char*)& register_value)+reg_offset, 1); 379 int reg_offset = 3 - (address - controller->base_address) % 4; local 381 /* HW_TRACE ((me, "byte %d %02x", reg_offset, write_byte)); */ 387 SLCR_SET_BYTE(controller, reg_offset, write_byte); 400 SDICR_SET_BYTE(controller, reg_offset, write_byte); 423 SDISR_CLEAR_FLAG_BYTE(controller, reg_offset, write_byt [all...] |
H A D | dv-tx3904irc.c | 341 int reg_offset = (address - controller->base_address) % 4; local 358 memcpy ((char*) dest + byte, ((char*)& register_value)+reg_offset, 1); 381 int reg_offset = (address - controller->base_address) % 4; local 401 memcpy (((char*)®ister_value)+reg_offset, (const char*)source + byte, 1);
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/netbsd-6-1-5-RELEASE/external/gpl3/gdb/dist/sim/bfin/ |
H A D | dv-eth_phy.c | 41 #define reg_offset(reg) (offsetof(struct eth_phy, reg) - reg_base()) macro 42 #define reg_idx(reg) (reg_offset (reg) / 4)
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/netbsd-6-1-5-RELEASE/external/gpl3/gcc/dist/gcc/ |
H A D | postreload.c | 1165 reg_offset[n] / reg_base_reg[n] / reg_mode[n] are only valid if 1170 reg_offset[n] in mode reg_mode[n] . 1172 sum of reg_offset[n] and the value of register reg_base_reg[n] variable 1174 static HOST_WIDE_INT reg_offset[FIRST_PSEUDO_REGISTER]; 1184 invalidate all previously collected reg_offset data. */ 1252 rtx new_src = gen_int_mode (INTVAL (src) - reg_offset[regno], 1268 if (INTVAL (src) == reg_offset [regno]) 1286 && ((reg_offset[regno] 1308 reg_offset[regno] = INTVAL (src); 1340 HOST_WIDE_INT base_offset = reg_offset[REGN [all...] |
/netbsd-6-1-5-RELEASE/gnu/dist/gcc4/gcc/ |
H A D | postreload.c | 1164 reg_offset[n] / reg_base_reg[n] / reg_mode[n] are only valid if 1169 reg_offset[n] in mode reg_mode[n] . 1171 sum of reg_offset[n] and the value of register reg_base_reg[n] variable 1173 static HOST_WIDE_INT reg_offset[FIRST_PSEUDO_REGISTER]; 1183 invalidate all previously collected reg_offset data. */ 1250 rtx new_src = gen_int_mode (INTVAL (src) - reg_offset[regno], 1264 if (INTVAL (src) == reg_offset [regno]) 1282 && ((reg_offset[regno] 1304 reg_offset[regno] = INTVAL (src); 1336 HOST_WIDE_INT base_offset = reg_offset[REGN [all...] |
/netbsd-6-1-5-RELEASE/gnu/dist/gcc4/gcc/config/m32r/ |
H A D | m32r.c | 1542 unsigned int reg_offset = var_size + args_size; 1543 if (reg_offset == 0) 1545 else if (reg_offset < 128) 1547 sp_str, IMMEDIATE_PREFIX, reg_offset); 1548 else if (reg_offset < 32768) 1550 sp_str, sp_str, IMMEDIATE_PREFIX, reg_offset); 1551 else if (reg_offset < (1 << 24)) local 1554 IMMEDIATE_PREFIX, reg_offset, 1559 IMMEDIATE_PREFIX, reg_offset >> 16, 1562 IMMEDIATE_PREFIX, reg_offset 1526 unsigned int reg_offset = var_size + args_size; local [all...] |
/netbsd-6-1-5-RELEASE/sys/arch/mac68k/obio/ |
H A D | esp.c | 182 unsigned long reg_offset; local 187 reg_offset = SCSIBase - IOBase; 202 if (reg_offset == 0x10000) { 205 } else if (reg_offset == 0x18000) { 248 if (reg_offset == 0x10000) {
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/netbsd-6-1-5-RELEASE/gnu/dist/gcc4/gcc/config/alpha/ |
H A D | alpha.c | 7541 HOST_WIDE_INT reg_offset; 7566 reg_offset = 8; 7568 reg_offset = ALPHA_ROUND (current_function_outgoing_args_size); 7695 if (reg_offset + sa_size > 0x8000) 7697 int low = ((reg_offset & 0xffff) ^ 0x8000) - 0x8000; 7701 sa_bias = reg_offset - low, reg_offset = low; 7703 sa_bias = reg_offset, reg_offset = 0; 7724 emit_frame_store (REG_RA, sa_reg, sa_bias, reg_offset); 7524 HOST_WIDE_INT reg_offset; local 7837 HOST_WIDE_INT reg_offset; local 8042 HOST_WIDE_INT reg_offset; local [all...] |
/netbsd-6-1-5-RELEASE/external/gpl3/gcc/dist/gcc/config/score/ |
H A D | score7.c | 456 info->reg_offset = ARG_REG_NUM; 459 info->reg_offset = cum->num_gprs; 461 info->reg_offset += info->reg_offset & 1; 470 max_regs = ARG_REG_NUM - info->reg_offset; 799 cum->num_gprs = info.reg_offset + info.reg_words; 827 if (info.reg_offset == ARG_REG_NUM) 831 return gen_rtx_REG (mode, ARG_REG_FIRST + info.reg_offset); 839 reg = gen_rtx_REG (SImode, ARG_REG_FIRST + info.reg_offset + i);
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H A D | score3.h | 47 unsigned int reg_offset; /* The offset of the first register from */ member in struct:score3_arg_info
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H A D | score7.h | 47 unsigned int reg_offset; /* The offset of the first register from */ member in struct:score7_arg_info
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/netbsd-6-1-5-RELEASE/sys/dev/pci/ixgbe/ |
H A D | ixgbe_mbx.c | 589 u32 reg_offset = (vf_number < 32) ? 0 : 1; local 598 vflre = IXGBE_READ_REG(hw, IXGBE_VFLRE(reg_offset)); 607 IXGBE_WRITE_REG(hw, IXGBE_VFLREC(reg_offset), (1 << vf_shift));
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/netbsd-6-1-5-RELEASE/external/gpl3/gcc/dist/gcc/config/m32r/ |
H A D | m32r.c | 1713 unsigned int reg_offset = var_size + args_size; 1715 if (reg_offset == 0) 1717 else if (reg_offset < 32768) 1719 GEN_INT (reg_offset))); 1724 emit_insn (gen_movsi (tmp, GEN_INT (reg_offset))); 1731 unsigned int reg_offset = var_size + args_size; 1733 if (reg_offset == 0) 1735 else if (reg_offset < 32768) 1737 GEN_INT (reg_offset))); 1742 emit_insn (gen_movsi (tmp, GEN_INT (reg_offset))); 1696 unsigned int reg_offset = var_size + args_size; local 1714 unsigned int reg_offset = var_size + args_size; local [all...] |
/netbsd-6-1-5-RELEASE/external/gpl3/gcc/dist/gcc/config/arc/ |
H A D | arc.c | 991 unsigned int reg_offset; /* Offset from new sp to store regs. */ 1082 unsigned int reg_size, reg_offset; 1092 reg_offset = FIRST_PARM_OFFSET(0) + crtl->outgoing_args_size; 1131 current_frame_info.reg_offset = reg_offset; 1251 arc_save_restore (file, sp_str, current_frame_info.reg_offset, 1313 arc_save_restore (file, sp_str, current_frame_info.reg_offset, 980 unsigned int reg_offset; /* Offset from new sp to store regs. */ member in struct:arc_frame_info 1071 unsigned int reg_size, reg_offset; local
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/netbsd-6-1-5-RELEASE/gnu/dist/gcc4/gcc/config/arc/ |
H A D | arc.c | 993 unsigned int reg_offset; /* Offset from new sp to store regs. */ 1084 unsigned int reg_size, reg_offset; 1094 reg_offset = FIRST_PARM_OFFSET(0) + current_function_outgoing_args_size; 1133 current_frame_info.reg_offset = reg_offset; 1253 arc_save_restore (file, sp_str, current_frame_info.reg_offset, 1315 arc_save_restore (file, sp_str, current_frame_info.reg_offset, 983 unsigned int reg_offset; /* Offset from new sp to store regs. */ member in struct:arc_frame_info 1074 unsigned int reg_size, reg_offset; local
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