Searched refs:fpscr (Results 1 - 25 of 37) sorted by relevance

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/netbsd-6-1-5-RELEASE/lib/libc/arch/powerpc64/gen/
H A Dfpsetsticky.c56 uint64_t fpscr; local
59 __asm volatile("mffs %0" : "=f"(fpscr));
60 old = ((uint32_t)fpscr & STICKYBITS) >> STICKYSHFT;
67 fpscr &= ~INVBITS;
69 fpscr |= INVBITS;
70 fpscr &= ~STICKYBITS;
71 fpscr |= ((uint32_t)mask << STICKYSHFT) & STICKYBITS;
75 if (fpscr & (STICKYBITS|INVBITS))
76 fpscr |= FPSCR_FX;
78 fpscr
[all...]
H A Dfpsetmask.c53 uint64_t fpscr; local
56 __asm volatile("mffs %0" : "=f"(fpscr));
57 old = ((uint32_t)fpscr & MASKBITS) >> MASKSHFT;
58 fpscr &= ~MASKBITS;
59 fpscr |= ((uint32_t)mask << MASKSHFT) & MASKBITS;
60 __asm volatile("mtfsf 0xff,%0" :: "f"(fpscr));
H A Dfpsetround.c52 uint64_t fpscr; local
55 __asm volatile("mffs %0" : "=f"(fpscr));
56 old = (uint32_t)fpscr & ROUNDBITS;
57 fpscr &= ~ROUNDBITS;
58 fpscr |= rnd_dir & ROUNDBITS;
59 __asm volatile("mtfsf 0xff,%0" :: "f"(fpscr));
H A Dflt_rounds.c57 uint64_t fpscr;
59 __asm volatile("mffs %0" : "=f"(fpscr));
60 return map[((uint32_t)fpscr & FPSCR_RN)];
H A Dfpgetround.c53 uint64_t fpscr; local
55 __asm volatile("mffs %0" : "=f"(fpscr));
56 return (((uint32_t)fpscr & ROUNDBITS) >> ROUNDSHFT);
H A Dfpgetmask.c53 uint64_t fpscr; local
55 __asm volatile("mffs %0" : "=f"(fpscr));
56 return (((uint32_t)fpscr & MASKBITS) >> MASKSHFT);
H A Dfpgetsticky.c53 uint64_t fpscr; local
55 __asm volatile("mffs %0" : "=f"(fpscr));
56 return (((uint32_t)fpscr & STICKYBITS) >> STICKYSHFT);
/netbsd-6-1-5-RELEASE/external/gpl3/gdb/dist/sim/testsuite/sim/sh/
H A Dfpchg.s10 sts fpscr, r0
13 sts fpscr, r0
16 sts fpscr, r0
19 sts fpscr, r0
22 sts fpscr, r0
H A Dfrchg.s10 sts fpscr, r0
13 sts fpscr, r0
16 sts fpscr, r0
19 sts fpscr, r0
22 sts fpscr, r0
H A Dfschg.s10 sts fpscr, r0
13 sts fpscr, r0
16 sts fpscr, r0
19 sts fpscr, r0
22 sts fpscr, r0
/netbsd-6-1-5-RELEASE/external/gpl3/gdb/dist/sim/testsuite/sim/sh64/compact/
H A Dtestutils.inc19 sts fpscr, r7
23 lds r7, fpscr
28 sts fpscr, r7
33 lds r7, fpscr
/netbsd-6-1-5-RELEASE/external/gpl3/binutils/dist/gas/testsuite/gas/sh/
H A Dfp.s38 lds r3,fpscr
39 lds.l @r3+,fpscr
42 sts fpscr,r3
43 sts.l fpscr,@-r3
/netbsd-6-1-5-RELEASE/sys/arch/powerpc/include/
H A Dreg.h62 double fpscr; /* Status and Control Register */ member in struct:fpreg
/netbsd-6-1-5-RELEASE/sys/arch/powerpc/powerpc/
H A Dfpu.c139 uint32_t fpscr, ofpscr; local
166 "stfd 0,0(%[fpscr])\n" /* store it */
169 [fpscr] "b"(&pcb->pcb_fpu.fpscr),
179 fpscr64 = *(uint64_t *)&pcb->pcb_fpu.fpscr;
180 ((uint32_t *)&pcb->pcb_fpu.fpscr)[_QUAD_LOWWORD] &= ~MASKBITS;
194 fpscr = ((uint32_t *)&pcb->pcb_fpu.fpscr)[_QUAD_LOWWORD];
195 if (fpscr & ofpscr & STICKYBITS)
196 fpscr
[all...]
/netbsd-6-1-5-RELEASE/external/gpl3/gdb/dist/gdb/testsuite/gdb.disasm/
H A Dsh3.s48 lds r3,fpscr
49 lds.l @r3+,fpscr
52 sts fpscr,r3
53 sts.l fpscr,@-r3
/netbsd-6-1-5-RELEASE/external/gpl3/binutils/dist/gas/testsuite/gas/arm/
H A Dvfp1xD.d10 0+000 <[^>]*> eef1fa10 (vmrs APSR_nzcv, fpscr|fmstat)
62 0+0d0 <[^>]*> eef10a10 (vmrs|fmrx) r0, fpscr
66 0+0e0 <[^>]*> eee10a10 (vmsr|fmxr) fpscr, r0
188 0+2c8 <[^>]*> 0ef1fa10 (vmrseq APSR_nzcv, fpscr|fmstateq)
252 0+3c8 <[^>]*> eef10a10 vmrs r0, fpscr
253 0+3cc <[^>]*> eef11a10 vmrs r1, fpscr
254 0+3d0 <[^>]*> eef12a10 vmrs r2, fpscr
255 0+3d4 <[^>]*> eef13a10 vmrs r3, fpscr
256 0+3d8 <[^>]*> eef14a10 vmrs r4, fpscr
257 0+3dc <[^>]*> eef15a10 vmrs r5, fpscr
[all...]
/netbsd-6-1-5-RELEASE/external/gpl3/gcc/dist/gcc/config/sh/
H A Dlib1funcs-Os-4-200.asm44 sts fpscr,r1
45 lds.l @r0+,fpscr
93 lds.l @r15+,fpscr
102 lds r1,fpscr
273 sts.l fpscr,@-r15
276 lds.l @r0+,fpscr
306 lds.l @r15+,fpscr
/netbsd-6-1-5-RELEASE/external/gpl3/gdb/dist/gdb/
H A Daix-thread.c1107 uint32_t fpscr)
1121 (char *) &fpscr);
1131 uint32_t fpscr)
1145 (char *) &fpscr);
1188 ctx.xer, ctx.fpscr);
1191 ctx.xer, ctx.fpscr);
1369 uint32_t *fpscr)
1398 regcache_raw_collect (regcache, tdep->ppc_fpscr_regnum, fpscr);
1405 uint32_t *fpscr)
1433 regcache_raw_collect (regcache, tdep->ppc_fpscr_regnum, fpscr);
1104 supply_sprs64(struct regcache *regcache, uint64_t iar, uint64_t msr, uint32_t cr, uint64_t lr, uint64_t ctr, uint32_t xer, uint32_t fpscr) argument
1128 supply_sprs32(struct regcache *regcache, uint32_t iar, uint32_t msr, uint32_t cr, uint32_t lr, uint32_t ctr, uint32_t xer, uint32_t fpscr) argument
1366 fill_sprs64(const struct regcache *regcache, uint64_t *iar, uint64_t *msr, uint32_t *cr, uint64_t *lr, uint64_t *ctr, uint32_t *xer, uint32_t *fpscr) argument
1402 fill_sprs32(const struct regcache *regcache, uint32_t *iar, uint32_t *msr, uint32_t *cr, uint32_t *lr, uint32_t *ctr, uint32_t *xer, uint32_t *fpscr) argument
[all...]
H A Dppcobsd-nat.c42 PT_GETREGS/PT_SETREGS, but fpscr wasn't available.. */
224 ppcobsd_fpreg_offsets.fpscr_offset = offsetof (struct fpreg, fpscr);
/netbsd-6-1-5-RELEASE/external/gpl3/gdb/dist/sim/ppc/
H A Dregisters.h268 fpscreg fpscr; member in struct:_registers
346 #define FPSCR cpu_registers(processor)->fpscr
H A Dinterrupts.c451 && cpu_registers(processor)->fpscr & fpscr_fex) {
501 && cpu_registers(processor)->fpscr & fpscr_fex)
/netbsd-6-1-5-RELEASE/gnu/dist/gcc4/gcc/config/rs6000/
H A Ddarwin-fallback.c260 uint32_t fpscr; member in struct:gcc_float_vector_state
441 set_offset (SPEFSCR_REGNO, &float_vector_state->fpscr);
H A Dlinux-unwind.h68 unsigned int fpscr; member in struct:gcc_regs
/netbsd-6-1-5-RELEASE/external/gpl3/gcc/dist/gcc/config/rs6000/
H A Ddarwin-fallback.c266 uint32_t fpscr; member in struct:gcc_float_vector_state
456 set_offset (R_SPEFSCR, &float_vector_state->fpscr);
H A Dlinux-unwind.h64 unsigned int fpscr; member in struct:gcc_regs

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