Searched refs:TISR_TMR0 (Results 1 - 2 of 2) sorted by relevance

/netbsd-6-1-5-RELEASE/sys/arch/arm/xscale/
H A Di80321_timer.c198 tisr_write(TISR_TMR0); /* clear interrupt */
257 tisr_write(TISR_TMR0); /* clear interrupt */
362 tisr_write(TISR_TMR0);
H A Di80321reg.h307 #define TISR_TMR0 (1U << 0) macro

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