/netbsd-6-1-5-RELEASE/external/gpl3/binutils/dist/gas/testsuite/gas/mt/ |
H A D | badinsn1.s | 3 add R1,R2,R3,R4
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H A D | badoffsetlow.s | 5 label2: add R4,R5,R6
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/netbsd-6-1-5-RELEASE/external/gpl3/binutils/dist/gas/testsuite/gas/bfin/ |
H A D | vector2.d | 10 8: 0c c4 25 06 R3.H = R3.L = SIGN \(R4.H\) \* R5.H \+ SIGN \(R4.L\) \* R5.L; 13 14: 0c c4 2e 08 R4.H = R4.L = SIGN \(R5.H\) \* R6.H \+ SIGN \(R5.L\) \* R6.L; 15 1c: 0c c4 1c 04 R2.H = R2.L = SIGN \(R3.H\) \* R4.H \+ SIGN \(R3.L\) \* R4.L; 19 2c: 09 c6 2c c6 R3 = VIT_MAX \(R4, R5\) \(ASR\); 22 38: 09 c6 35 88 R4 = VIT_MAX \(R5, R6\) \(ASL\); 24 40: 09 c6 23 84 R2 = VIT_MAX \(R3, R4\) \(ASL\); 30 58: 09 c6 05 08 R4 [all...] |
H A D | logical.d | 15 a: e3 43 R3 =~ R4; 16 c: ec 43 R4 =~ R5; 20 10: a3 56 R2 = R3 \| R4; 25 16: 02 59 R4 = R2 \^ R0; 32 26: 0c c6 00 48 R4.L = CC = BXOR \(A0, A1, CC\);
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H A D | bit.d | 7 0: fc 4c BITCLR \(R4, 0x1f\);.* 28 1a: 0a c6 0a 08 R4 = EXTRACT \(R2, R1.L\) \(Z\); 30 22: 0a c6 23 4e R7 = EXTRACT \(R3, R4.L\) \(X\); 36 32: 08 c6 25 40 BITMUX \(R4, R5, A0\) \(ASL\);
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H A D | vector.d | 8 0: 0c c4 0d 08 R4.H = R4.L = SIGN \(R1.H\) \* R5.H \+ SIGN \(R1.L\) \* R5.L; 25 2c: 00 c4 02 48 R4 = R0 \+\|- R2; 27 34: 00 c4 1c cc R6 = R3 -\|- R4; 29 3c: 01 c4 63 bf R5 = R4 \+\|\+ R3, R7 = R4 -\|- R3 \(SCO, ASR\); 40 60: 81 c6 e0 09 R4 = R0 >>> 0x4 \(V\); 49 7c: 01 c6 11 88 R4 = LSHIFT R1 BY R2.L \(V\); 59 8c: 04 c2 08 e1 R4.H = R1.H \* R0.H, R4 [all...] |
H A D | loop_temps.s | 7 [--SP] = R4; 235 R4 = [I0++] || R5 = [I2--]; define 238 A1 -= R4.H*R5.H, A0 += R4.L*R5.L (IS) || R4 = [I0++] || R5 = [I2--]; 241 R4 = A0; define 242 R4 <<= 3; 243 R4.L = R4 (RND); 245 R4 258 R4 = [I0++]; define 309 R4 = [SP++]; define [all...] |
H A D | logical.s | 14 R4 = ~R5; define 20 r2 = R3 | R4; 38 R4.L = cC = bXor (a0, a1, cc);
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H A D | parallel3.d | 8 0: 0c cc 0d 08 R4.H = R4.L = SIGN \(R1.H\) \* R5.H \+ SIGN \(R1.L\) \* R5.L \|\| \[P0\] = P0 \|\| NOP; 30 58: 00 cc 02 48 R4 = R0 \+\|- R2 \|\| \[P1 \+ 0x30\] = P0 \|\| NOP; 34 68: 00 cc 1c cc R6 = R3 -\|- R4 \|\| \[P1 \+ 0x28\] = P0 \|\| NOP; 38 78: 01 cc 63 bf R5 = R4 \+\|\+ R3, R7 = R4 -\|- R3 \(SCO, ASR\) \|\| \[P2\+\+\] = P0 \|\| NOP; 56 c0: 81 ce e0 09 R4 = R0 >>> 0x4 \(V\) \|\| \[P4\] = P0 \|\| NOP; 70 f8: 01 ce 11 88 R4 = LSHIFT R1 BY R2.L \(V\) \|\| \[P5\] = P0 \|\| NOP; 78 118: 04 ca 08 e1 R4.H = R1.H \* R0.H, R4 [all...] |
H A D | parallel.d | 12 10: 0a ce 0a 08 R4 = EXTRACT \(R2, R1.L\) \(Z\) \|\| I2 -= M0 \|\| NOP; 16 20: 0a ce 23 4e R7 = EXTRACT \(R3, R4.L\) \(X\) \|\| I3 \+= M1 \(BREV\) \|\| NOP; 24 40: 08 ce 25 40 BITMUX \(R4, R5, A0\) \(ASL\) \|\| SP = \[P0\] \|\| NOP; 40 80: 10 cc 00 c0 A1 = ABS A0, A0 = ABS A0 \|\| R4 = \[P5 \+ 0x38\] \|\| R0.H = W\[I0\]; 44 90: 02 cc 10 a8 R4.L = R2.H \+ R0.L \(S\) \|\| B\[FP\] = R0 \|\| R2.H = W\[I2--\]; 48 a0: 02 cc 35 0c R6.L = R6.L \+ R5.L \(NS\) \|\| B\[P1\] = R0 \|\| R4.L = W\[I3\+\+\]; 50 a8: 05 cc 01 98 R4.L = R0 \+ R1 \(RND20\) \|\| B\[P2\] = R0 \|\| R5.L = W\[I2--\]; 62 d8: 25 cc 0a 44 R2.H = R1 - R2 \(RND12\) \|\| R1 = B\[P2\] \(Z\) \|\| W\[I2\+\+\] = R4.H; 64 e0: 07 ce 25 0c R6.L = EXPADJ \(R5, R4.L\) \|\| R1 = B\[P3\] \(Z\) \|\| W\[I1--\] = R3.H; 68 f0: 07 ce 2b 48 R4 [all...] |
H A D | store.s | 27 [i3--] = R4; 33 w [ i3] = R4.h; 48 W [fp--] = R4;
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H A D | store.d | 27 2a: 9c 9e \[I3--\] = R4; 31 2e: 5c 9f W\[I3\] = R4.H; 35 36: 07 8d W\[FP \+\+ P0\] = R4.H; 44 44: bc 96 W\[FP--\] = R4;
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H A D | load.s | 63 R4 = [Fp + 40]; define 72 R4 = [i3 ++ M0]; define 80 R4 = w [p1 + 30] (Z); define 103 R4.h = W [Fp ++ p0]; 118 R4 = B [P1++] (Z); define
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H A D | move.d | 17 12: e4 31 R4 = RETX; 22 1c: a3 31 R4 = LC1; 37 42: 8b c0 00 39 R4 = A0 \(FU\); 62 7a: 09 c4 20 80 A1.L = R4.L; 81 b0: 65 43 R5 = R4.B \(Z\);
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H A D | arithmetic.d | 22 26: 02 c4 10 a8 R4.L = R2.H \+ R0.L \(S\); 27 32: 05 c4 01 98 R4.L = R0 \+ R1 \(RND20\); 53 64: 07 c6 25 0c R6.L = EXPADJ \(R5, R4.L\); 55 6c: 07 c6 2b 48 R4.L = EXPADJ \(R3, R5.L\) \(V\); 63 7c: 07 c4 38 48 R4 = MIN \(R7, R0\); 88 b8: 28 c3 15 27 R4 = R2.H \* R5.H \(ISS2\); 99 dc: c4 40 R4 \*= R0; 106 ec: 03 c0 21 0c A0 \+= R4.H \* R1.L; 120 11c: 03 c0 ac 28 R2.L = \(A0 \+= R5.L \* R4.L\); 123 128: 63 c1 6c 30 R1.L = \(A0 -= R5.L \* R4 [all...] |
H A D | shift.s | 35 R0 = Ashift R4 by r1.l (s); 65 r5 = LShIft R4 bY r3.L; 75 R4 = Rot r7 by 30; define 82 R0 = Rot R4 BY R3.L;
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/netbsd-6-1-5-RELEASE/sys/arch/mac68k/dev/ |
H A D | sbc.c | 276 #define R4 *(u_int32_t *)data = *long_data, data += 4; macro 281 R4; R4; R4; R4; R4; R4; R4; R4; 282 R4; R 292 #undef R4 macro 567 #define R4 macro 576 #undef R4 macro [all...] |
H A D | mac68k5380.c | 430 #define R4 *long_data++ = *long_drq++ macro 432 R4; R4; R4; R4; R4; R4; R4; R4; 433 R4; R 439 #undef R4 macro [all...] |
/netbsd-6-1-5-RELEASE/lib/libc/compat/arch/vax/sys/ |
H A D | compat___sigtramp2.S | 49 pushr $(R0|R1|R2|R3|R4|R5) # save scratch registers 51 popr $(R0|R1|R2|R3|R4|R5) # restore regs
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/netbsd-6-1-5-RELEASE/crypto/external/bsd/heimdal/dist/tests/kdc/ |
H A D | check-delegation.in | 45 R4=TEST4.H5L.SE 78 ${kadmin} ${initflags} ${R4} || exit 1 84 ${kadmin} add -p cross3 --use-defaults krbtgt/${R4}@${R3} || exit 1 93 ${kadmin} add -p foo --use-defaults host/server.test4.h5l.se@${R4} || exit 1 94 ${kadmin} modify --attributes=+ok-as-delegate host/server.test4.h5l.se@${R4} || exit 1 100 ${kadmin} check ${R4} || exit 1 125 ${kgetcred} krbtgt/${R4}@${R3} || { ec=1 ; eval "${testfailed}"; } 127 ${kgetcred} host/server.test4.h5l.se@${R4} || { ec=1 ; eval "${testfailed}"; } 145 #${kgetcred} host/server.test4.h5l.se@${R4} || { ec=1 ; eval "${testfailed}"; }
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/netbsd-6-1-5-RELEASE/external/bsd/openldap/dist/libraries/liblutil/ |
H A D | sha1.c | 69 * (R0+R1), R2, R3, R4 are the different operations (rounds) used in SHA1 75 #define R4(v,w,x,y,z,i) z+=(w^x^y)+blk(i)+0xCA62C1D6+rol(v,5);w=rol(w,30); macro 116 R4(a,b,c,d,e,60); R4(e,a,b,c,d,61); R4(d,e,a,b,c,62); R4(c,d,e,a,b,63); 117 R4(b,c,d,e,a,64); R4(a,b,c,d,e,65); R4(e,a,b,c,d,66); R4( [all...] |
/netbsd-6-1-5-RELEASE/external/bsd/wpa/dist/src/crypto/ |
H A D | sha1-internal.c | 144 /* (R0+R1), R2, R3, R4 are the different operations used in SHA1 */ 156 #define R4(v,w,x,y,z,i) \ macro 214 R4(a,b,c,d,e,60); R4(e,a,b,c,d,61); R4(d,e,a,b,c,62); R4(c,d,e,a,b,63); 215 R4(b,c,d,e,a,64); R4(a,b,c,d,e,65); R4(e,a,b,c,d,66); R4( [all...] |
/netbsd-6-1-5-RELEASE/external/gpl3/gcc/dist/gcc/config/picochip/libgccExtras/ |
H A D | ashrsi3.asm | 47 SUB.0 16,R2,R4 // R4 := R4 - R2 (HI) 49 LSL.0 R5,R4,R5 // R5 := R5 << R4 50 LSL.0 R3,R4,R4 // R4 := R1 << R4 53 =-> OR.0 R4,R [all...] |
H A D | udivmodsi4.asm | 48 =-> COPY.0 R0,R4 \ COPY.1 R1,R5 69 COPY.0 0,R4 \ COPY.1 0,R5 \ JR (R12) // Return to caller 76 =-> COPY.0 1,R4 \ COPY.1 0,R5 105 =-> SUB.0 0,R14,R4 \ COPY.1 0,R10 113 LSR.0 R6,R4,R4 114 OR.0 R11,R4,R11 119 COPY.0 R8,R4 \ COPY.1 R9,R5 125 SUB.0 R4,R10,R0 \ COPY.1 R8,R14 127 // workingResult in R4, [all...] |
/netbsd-6-1-5-RELEASE/external/gpl3/gdb/dist/sim/h8300/ |
H A D | inst.h | 30 R0, R1, R2, R3, R4, R5, R6, R7, enumerator in enum:__anon1630
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