/netbsd-6-1-5-RELEASE/external/gpl3/binutils/dist/gas/testsuite/gas/mt/ |
H A D | badreg.s | 3 add R16,R10,R9
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H A D | misc.d | 16 18: 00 bc a0 00 add R10,R11,R12
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/netbsd-6-1-5-RELEASE/external/bsd/pcc/dist/pcc/arch/vax/ |
H A D | macdefs.h | 135 # define R10 10 macro 225 { R9, R10, XR8, XR10, -1 }, \ 226 { R10, R11, XR9, -1 },
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/netbsd-6-1-5-RELEASE/external/gpl3/gcc/dist/gcc/config/picochip/libgccExtras/ |
H A D | udivmodsi4.asm | 105 =-> SUB.0 0,R14,R4 \ COPY.1 0,R10 111 =-> LSL.0 R6,R14,R10 125 SUB.0 R4,R10,R0 \ COPY.1 R8,R14 129 // alignedDivisor in R10,11 134 // R0 := R4 - zeroExtend (R10) - only need 33-bits (i.e., 48-bits) 143 =-> SUB.0 R4,R10,R0 \ OR.1 R9,R3,R5 150 =-> SUB.0 [LSL R4,1],R10,R0 \LSL.1 R4,1,R4 158 // R10 is filled with a useful constant. 163 BLT remainderHasMoreThan16Bits \ LSR.0 R5,R14,R7 \ COPY.1 -1,R10 172 LSL.0 R10,R1 [all...] |
/netbsd-6-1-5-RELEASE/external/gpl3/gdb/dist/gdb/ |
H A D | vax-nat.c | 57 R6, R7, R8, R9, R10, R11,
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H A D | amd64-windows-nat.c | 36 context_offset (R10),
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H A D | sh-stub.c | 264 R8, R9, R10, R11, R12, R13, R14, enumerator in enum:regnames 1180 mov.l r10, @(0x28, r0) ! save R10 1237 mov.l @r1+, r10 ! restore R10
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H A D | m32r-stub.c | 122 R8, R9, R10, R11, R12, R13, R14, R15, enumerator in enum:regnames
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/netbsd-6-1-5-RELEASE/sys/arch/amd64/include/ |
H A D | frame_regs.h | 35 greg(r10, R10, 6) \
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/netbsd-6-1-5-RELEASE/external/gpl3/gdb/dist/gdb/gdbserver/ |
H A D | win32-arm-low.c | 57 context_offset (R10),
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H A D | win32-i386-low.c | 317 context_offset (R10),
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/netbsd-6-1-5-RELEASE/external/bsd/pcc/dist/pcc/arch/arm/ |
H A D | macdefs.h | 127 #define R10 10 macro 134 #define SL R10 200 { R9, R10, R8R9, -1 }, \
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/netbsd-6-1-5-RELEASE/external/bsd/pcc/dist/pcc/arch/pdp10/ |
H A D | macdefs.h | 170 #define R10 010 macro 229 { R7, R10, XR6, XR10, -1 }, \ 230 { R10, R11, XR7, XR11, -1 }, \
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/netbsd-6-1-5-RELEASE/external/gpl3/binutils/dist/gas/testsuite/gas/tic4x/ |
H A D | registers.s | 46 ldi R0,R10
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/netbsd-6-1-5-RELEASE/sys/arch/vax/include/ |
H A D | asm.h | 46 #define R10 0x400 macro
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/netbsd-6-1-5-RELEASE/external/bsd/pcc/dist/pcc/arch/powerpc/ |
H A D | macdefs.h | 158 #define R10 10 /* scratch register / argument 7 */ macro 245 SAREG|TEMPREG, /* R10 */ \ 323 { R9, R10, R8R9, -1 }, \
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H A D | order.c | 385 static int r[] = { R10, R9, R8, R7, R6, R5, R4, R3, R30, R31, -1 };
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H A D | code.c | 1224 if (reg > R10) { 1227 } else if (reg == R10) { 1460 if (reg > R10 && r->n_op != STARG) {
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/netbsd-6-1-5-RELEASE/external/bsd/pcc/dist/pcc/arch/hppa/ |
H A D | macdefs.h | 127 #define R10 10 macro 363 { R10, R9, -1 }, \ 364 { R11, R10, -1 }, \
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H A D | local2.c | 47 R4, R5, R6, R7, R8, R9, R10, R11, R12, R13, R14, R15, R16, R17, R18, 51 R18, R4, R5, R6, R7, R8, R9, R10, R11, R12, R13, R14, R15, R16, R17,
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/netbsd-6-1-5-RELEASE/gnu/dist/gcc4/gcc/config/rs6000/ |
H A D | darwin-vecsave.asm | 135 /* As restVec, but the original VRsave value passed in R10. */ 163 /* restore VRsave from R10. */
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H A D | darwin-world.asm | 163 R10 is the C++ EH stack adjust parameter, we return to the caller`s caller. 165 USES: R0 R10 R11 R12 and R7 R8 170 rest_world doesn't use the R10 stack adjust parameter, nor does it
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/netbsd-6-1-5-RELEASE/external/bsd/pcc/dist/pcc/arch/amd64/ |
H A D | macdefs.h | 165 #define R10 012 macro
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/netbsd-6-1-5-RELEASE/external/gpl3/binutils/dist/gas/testsuite/gas/i386/ |
H A D | x86_64.s | 68 ADD EDX,[RAX+R10*8]
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/netbsd-6-1-5-RELEASE/sys/arch/vax/boot/xxboot/ |
H A D | start.S | 228 ENTRY(unit_init, R6|R7|R8|R9|R10|R11)
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