Searched refs:PSR_PIL (Results 1 - 13 of 13) sorted by relevance

/netbsd-6-1-5-RELEASE/sys/arch/sparc/include/
H A Dpsl.h67 #define PSR_PIL 0x00000f00 /* interrupt level */ macro
271 oldipl = psr & PSR_PIL;
291 psr &= ~PSR_PIL; \
320 oldipl = psr & PSR_PIL;
351 "r" (psr & ~PSR_PIL), "rn" (newipl));
H A Dcpu.h104 #define CLKF_LOPRI(framep,n) (((framep)->psr & PSR_PIL) < (n) << 8)
/netbsd-6-1-5-RELEASE/sys/arch/sparc/sparc/
H A Dlock_stubs.s132 and %o1, PSR_PIL, %o3
136 andn %o1, PSR_PIL, %o1
176 andn %o1, PSR_PIL, %o1
199 or %o4, PSR_PIL, %o5
H A Dintr.c677 ih->ih_classipl = (classipl << 8) & PSR_PIL;
787 ih->ih_classipl = (level << 8) & PSR_PIL;
H A Dlocore.s1208 or t1, PSR_PIL, t2; \
2226 or %l0, PSR_PIL, %l4 ! splhigh()
2503 andn %l0, PSR_PIL, %l4 ! %l4 = psr & ~PSR_PIL |
2533 andn %o3, PSR_PIL, %o3 ! %o3 = psr & ~PSR_PIL
2639 andn %l0, PSR_PIL, %l4 ! %l4 = psr & ~PSR_PIL |
2688 andn %l0, PSR_PIL, %l4 ! %l4 = psr & ~PSR_PIL |
[all...]
H A Dsvr4_machdep.c554 #define PRESERVE_PSR (PSR_IMPL|PSR_VER|PSR_PIL|PSR_S|PSR_PS|PSR_ET|PSR_CWP)
H A Dcpu.c678 pil = (getpsr() & PSR_PIL) >> 8;
/netbsd-6-1-5-RELEASE/common/lib/libc/arch/sparc/atomic/
H A Datomic_cas.S43 or %o4, PSR_PIL, %o5 ;\
/netbsd-6-1-5-RELEASE/sys/arch/sparc/stand/common/
H A Dsrt0.S96 wr %g0, PSR_S|PSR_PS|PSR_PIL, %psr ! set initial psr
127 andn %o0, PSR_PIL, %o0
/netbsd-6-1-5-RELEASE/sys/arch/sparc64/include/
H A Dpsl.h67 #define PSR_PIL 0x00000f00 /* interrupt level */ macro
/netbsd-6-1-5-RELEASE/sys/arch/sparc/dev/
H A Dkd.c349 if ((s1 & PSR_PIL) == 0) {
/netbsd-6-1-5-RELEASE/external/gpl3/gdb/dist/sim/erc32/
H A Dexec.c83 #define PSR_PIL 0x0f00 macro
1996 ((ext_irl == 15) || (ext_irl > (int) ((sregs->psr & PSR_PIL) >> 8)))) {
/netbsd-6-1-5-RELEASE/sys/arch/sparc64/sparc64/
H A Dlocore.s2797 or %l0, PSR_PIL, %l4 ! splhigh()

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