Searched refs:PSL_SE (Results 1 - 11 of 11) sorted by relevance

/netbsd-6-1-5-RELEASE/sys/arch/powerpc/include/
H A Dpsl.h58 #define PSL_SE 0x00000400 /* ..6. single-step trace enable */ macro
59 #define PSL_DWE PSL_SE /* .4.. debug wait enable */
60 #define PSL_UBLE PSL_SE /* B... user BTB lock enable */
124 * We also need to override the PSL_SE bit. 4xx have completely different
128 #undef PSL_SE macro
129 #define PSL_SE PSL_DE macro
H A Duserret.h73 * BookE doesn't PSL_SE but it does have a debug instruction completion
78 if (__predict_false(tf->tf_srr1 & PSL_SE)) {
/netbsd-6-1-5-RELEASE/sys/arch/powerpc/oea/
H A Dkgdb_glue.c83 kgdbregs[MSR] &= ~PSL_SE;
86 kgdbregs[MSR] |= PSL_SE;
H A Doea_machdep.c396 cpu_pslusermod = PSL_FP | PSL_FE0 | PSL_FE1 | PSL_LE | PSL_SE | PSL_BE;
/netbsd-6-1-5-RELEASE/sys/arch/powerpc/powerpc/
H A Dipkdb_glue.c93 ipkdbregs[PS] &= ~PSL_SE;
96 ipkdbregs[PS] |= PSL_SE;
H A Dprocess_machdep.c141 tf->tf_srr1 |= PSL_SE;
143 tf->tf_srr1 &= ~PSL_SE;
H A Drtas.c238 mtmsr(msr & ~(PSL_EE | PSL_FP | PSL_ME | PSL_FE0 | PSL_SE | PSL_BE |
H A Dpowerpc_machdep.c370 tf->tf_srr1 &= ~PSL_SE;
H A Dtrap.c116 tf->tf_srr1 &= ~PSL_SE;
/netbsd-6-1-5-RELEASE/sys/arch/powerpc/ibm4xx/
H A Dtrap.c169 tf->tf_srr1 &= ~PSL_SE;
388 if (srr1 & PSL_SE) {
/netbsd-6-1-5-RELEASE/sys/arch/powerpc/booke/
H A Dtrap.c517 KASSERT((tf->tf_srr1 & PSL_SE) == 0);

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