Searched refs:PSL_IR (Results 1 - 18 of 18) sorted by relevance

/netbsd-6-1-5-RELEASE/sys/arch/powerpc/include/
H A Dprofile.h137 if ((s & (PSL_IR | PSL_DR)) != (PSL_IR | PSL_DR)) \
H A Dpsl.h65 #define PSL_IR 0x00000020 /* .468 instruction address relocation */ macro
66 #define PSL_IS PSL_IR /* B... instruction address space */
117 #define PSL_USERSET (PSL_EE | PSL_PR | PSL_IR | PSL_DR | PSL_ME)
119 #define PSL_USERSET (PSL_EE | PSL_PR | PSL_IR | PSL_DR)
/netbsd-6-1-5-RELEASE/sys/arch/sandpoint/stand/altboot/
H A Dentry.S25 andi. 3,3,PSL_DR|PSL_IR
326 li 0,PSL_DR|PSL_IR
H A Dbrdsetup.c781 msr &= ~(PSL_ME | PSL_DR | PSL_IR);
/netbsd-6-1-5-RELEASE/sys/arch/powerpc/powerpc/
H A Dofwreal.S117 ori %r4,%r4,PSL_IR|PSL_DR /* turn on MMU */
253 andi. %r4,%r12,~(PSL_IR|PSL_DR)@l
H A Dpmap_subr.c446 MTMSR(msr & ~(PSL_IR|PSL_DR));
508 MTMSR(msr & ~(PSL_IR|PSL_DR));
H A Drtas.c239 PSL_FE1 | PSL_IR | PSL_DR | PSL_RI));
H A Dtrap_subr.S759 ori %r30,%r30,(PSL_DR|PSL_IR); /* turn on relocation */ \
878 andi. %r2,%r2,~(PSL_DR|PSL_IR|PSL_ME|PSL_RI)@l; \
1076 ori %r30,%r30,(PSL_DR|PSL_IR); /* turn on relocation */ \
/netbsd-6-1-5-RELEASE/sys/arch/powerpc/ibm4xx/
H A Dtrap_subr.S253 ori tmpreg,tmpreg,(PSL_DR|PSL_IR)@l; \
364 li %r31,(PSL_DR|PSL_IR)@l
405 li %r31,(PSL_DR|PSL_IR)@l
H A Dibm4xx_machdep.c220 : : "r"(0), "K"(PSL_IR|PSL_DR));
H A Dtrap.c223 tf->tf_srr1 |= PSL_IR; /* Re-enable IMMU */
345 tf->tf_srr1 |= PSL_IR; /* Re-enable IMMU */
H A Dpmap.c1191 "K" (PSL_IR | PSL_DR));
/netbsd-6-1-5-RELEASE/sys/arch/powerpc/oea/
H A Dofw_subr.S55 andi. %r0,%r0,PSL_IR|PSL_DR
H A Doea_machdep.c395 cpu_psluserset = PSL_EE | PSL_PR | PSL_ME | PSL_IR | PSL_DR | PSL_RI;
425 : "K"(PSL_IR|PSL_DR|PSL_ME|PSL_RI));
620 if ((msr & (PSL_IR|PSL_DR)) == 0) {
H A Dofwoea_machdep.c246 : "K"(PSL_IR|PSL_DR|PSL_ME|PSL_RI));
H A Dcpu_subr.c1343 msr |= PSL_IR|PSL_DR|PSL_ME|PSL_RI;
/netbsd-6-1-5-RELEASE/sys/arch/sandpoint/sandpoint/
H A Dmachdep.c405 msr &= ~(PSL_ME | PSL_DR | PSL_IR);
/netbsd-6-1-5-RELEASE/sys/arch/amigappc/amigappc/
H A Dmachdep.c466 if ((msr & (PSL_IR|PSL_DR)) == 0) {

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