Searched refs:PCIC_INTR (Results 1 - 5 of 5) sorted by relevance
/netbsd-6-1-5-RELEASE/sys/arch/hpcmips/vr/ |
H A D | vrecu.c | 218 r = pcic_read(h, PCIC_INTR); 220 pcic_write(h, PCIC_INTR, r | irq); 256 r = pcic_read(h, PCIC_INTR); 258 pcic_write(h, PCIC_INTR, r);
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/netbsd-6-1-5-RELEASE/sys/dev/isa/ |
H A D | i82365_isasubr.c | 196 intr = pcic_read(h, PCIC_INTR); 199 pcic_write(h, PCIC_INTR, intr); 479 reg = pcic_read(h, PCIC_INTR); 481 pcic_write(h, PCIC_INTR, reg | irq); 504 reg = pcic_read(h, PCIC_INTR); 506 pcic_write(h, PCIC_INTR, reg);
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/netbsd-6-1-5-RELEASE/sys/dev/ic/ |
H A D | i82365.c | 301 pcic_write(h, PCIC_INTR, 0); 473 pcic_write(h, PCIC_INTR, PCIC_INTR_ENABLE); 789 intr = pcic_read(h, PCIC_INTR); 791 pcic_write(h, PCIC_INTR, intr); 1311 intr = pcic_read(h, PCIC_INTR); 1313 pcic_write(h, PCIC_INTR, intr); 1371 pcic_write(h, PCIC_INTR, intr); 1411 intr = pcic_read(h, PCIC_INTR); 1413 pcic_write(h, PCIC_INTR, intr); 1435 intr = pcic_read(h, PCIC_INTR); [all...] |
H A D | i82365reg.h | 133 #define PCIC_INTR 0x03 /* RW */ macro
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/netbsd-6-1-5-RELEASE/sys/dev/pci/ |
H A D | pccbb.c | 908 bus_space_write_1(bmt, bmh, 0x800 + PCIC_INTR, 909 bus_space_read_1(bmt, bmh, 0x800 + PCIC_INTR) & ~PCIC_INTR_RESET); 977 * 2) Set bit 4 of PCIC_INTR, which is needed on some chips to enable 984 Pcic_write(sc, PCIC_INTR, PCIC_INTR_ENABLE); 2311 intr = Pcic_read(sc, PCIC_INTR); 2313 Pcic_write(sc, PCIC_INTR, intr); 2343 Pcic_write(sc, PCIC_INTR, intr); 2391 intr = Pcic_read(sc, PCIC_INTR); 2393 Pcic_write(sc, PCIC_INTR, intr); 2418 intr = Pcic_read(sc, PCIC_INTR); [all...] |
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