Searched refs:MMU_INIT (Results 1 - 17 of 17) sorted by relevance

/netbsd-6-1-5-RELEASE/sys/arch/zaurus/zaurus/
H A Dzaurus_start.S101 #define MMU_INIT(va,pa,n_sec,attr) \ define
111 MMU_INIT(0x00000000, 0x00000000, 1<<(32-L1_S_SHIFT), L1_TYPE_S|L1_S_AP(AP_KRW))
113 MMU_INIT(0xa0000000, 0xa0000000, 64, L1_TYPE_S|L1_S_C|L1_S_AP(AP_KRW))
115 MMU_INIT(0xc0000000, 0xa0000000, 64, L1_TYPE_S|L1_S_C|L1_S_AP(AP_KRW))
/netbsd-6-1-5-RELEASE/sys/arch/evbarm/g42xxeb/
H A Dg42xxeb_start.S143 #define MMU_INIT(va,pa,n_sec,attr) \ define
155 MMU_INIT(0x00000000, 0x00000000, 1<<(32-L1_S_SHIFT), L1_TYPE_S|L1_S_AP_KRW)
157 MMU_INIT(SDRAM_START, SDRAM_START, 64, L1_TYPE_S|L1_S_C|L1_S_AP_KRW)
161 MMU_INIT(0xc0000000, SDRAM_START, 64, L1_TYPE_S|L1_S_C|L1_S_AP_KRW)
/netbsd-6-1-5-RELEASE/sys/arch/evbarm/lubbock/
H A Dlubbock_start.S143 #define MMU_INIT(va,pa,n_sec,attr) \ define
156 MMU_INIT(0x00000000, 0x00000000, 1<<(32-L1_S_SHIFT), L1_TYPE_S|L1_S_AP_KRW)
158 MMU_INIT(SDRAM_START, SDRAM_START, 64, L1_TYPE_S|L1_S_C|L1_S_AP_KRW)
162 MMU_INIT(0xc0000000, SDRAM_START, 64, L1_TYPE_S|L1_S_C|L1_S_AP_KRW)
/netbsd-6-1-5-RELEASE/sys/arch/evbarm/mpcsa/
H A Dmpcsa_start.S149 #define MMU_INIT(va,pa,n_sec,attr) \ define
161 MMU_INIT(0x00000000, 0x00000000, 1<<(32-L1_S_SHIFT), L1_TYPE_S|L1_S_AP_KRW)
163 MMU_INIT(0xfff00000, 0xfff00000, 1, L1_TYPE_S|L1_S_AP_KRW)
165 MMU_INIT(0x20100000, 0x20100000, 63, L1_TYPE_S|L1_S_C|L1_S_AP_KRW)
167 MMU_INIT(0xc0000000, 0x20000000, 63, L1_TYPE_S|L1_S_C|L1_S_AP_KRW)
/netbsd-6-1-5-RELEASE/sys/arch/evbarm/smdk2xx0/
H A Dsmdk2800_start.S150 #define MMU_INIT(va,pa,n_sec,attr) \ define
157 MMU_INIT(0x00000000, 0x00000000, 1<<(32-L1_S_SHIFT), L1_TYPE_S|L1_S_AP_KRW)
159 MMU_INIT(SDRAM_START, SDRAM_START, 64, L1_TYPE_S|L1_S_C|L1_S_AP_KRW)
161 MMU_INIT(0xc0000000, SDRAM_START, 64, L1_TYPE_S|L1_S_C|L1_S_AP_KRW)
164 MMU_INIT(SMDK2800_IO_AREA_VBASE, S3C2800_PERIPHERALS, 2, L1_TYPE_S|L1_S_AP_KRW)
H A Dsmdk2410_start.S187 #define MMU_INIT(va,pa,n_sec,attr) \ define
194 MMU_INIT(0x00000000, 0x00000000, 1<<(32-L1_S_SHIFT), L1_TYPE_S|L1_S_AP_KRW)
196 MMU_INIT(SDRAM_START, SDRAM_START, 64, L1_TYPE_S|L1_S_C|L1_S_AP_KRW)
198 MMU_INIT(0xc0000000, SDRAM_START, 64, L1_TYPE_S|L1_S_C|L1_S_AP_KRW)
/netbsd-6-1-5-RELEASE/sys/arch/arm/omap/
H A Domap_start.S221 #define MMU_INIT(va,pa,n_sec,attr) \ define
229 MMU_INIT(KERNEL_BASE_phys, KERNEL_BASE_phys,
233 MMU_INIT(KERNEL_BASE, KERNEL_BASE_phys,
237 MMU_INIT(OMAP_TIPB_PBASE, OMAP_TIPB_PBASE,
241 MMU_INIT(0, 0, 0, 0)
/netbsd-6-1-5-RELEASE/sys/arch/evbarm/gemini/
H A Dgemini_start.S352 #define MMU_INIT(va,pa,n_sec,attr) \ define
360 MMU_INIT(KERNEL_BASE_phys, KERNEL_BASE_phys,
365 MMU_INIT(KERNEL_BASE_virt, KERNEL_BASE_phys,
370 MMU_INIT(GEMINI_GLOBAL_VBASE, GEMINI_GLOBAL_BASE,
375 MMU_INIT(GEMINI_UART_VBASE, GEMINI_UART_BASE,
380 MMU_INIT(GEMINI_LPCHC_VBASE, GEMINI_LPCHC_BASE,
385 MMU_INIT(GEMINI_LPCIO_VBASE, GEMINI_LPCIO_BASE,
390 MMU_INIT(GEMINI_DRAMC_VBASE, GEMINI_DRAMC_BASE,
395 MMU_INIT(0, 0, 0, 0)
/netbsd-6-1-5-RELEASE/sys/arch/evbarm/marvell/
H A Dmarvell_start.S189 #define MMU_INIT(va,pa,n_sec,attr) \ define
196 MMU_INIT(0x00000000, 0x00000000,
200 MMU_INIT(SDRAM_START, SDRAM_START,
204 MMU_INIT(0xc0000000, SDRAM_START,
/netbsd-6-1-5-RELEASE/sys/arch/evbarm/mmnet/
H A Dmmnet_start.S183 #define MMU_INIT(va,pa,n_sec,attr) \ define
190 MMU_INIT(0x00000000, 0x00000000,
194 MMU_INIT(SDRAM_START, SDRAM_START,
198 MMU_INIT(0xc0000000, SDRAM_START,
/netbsd-6-1-5-RELEASE/sys/arch/evbarm/stand/boot2440/
H A Dentry.S142 #define MMU_INIT(va,pa,n_sec,attr) \ define
149 MMU_INIT(0x00000000, 0x00000000, 1<<(32-L1_S_SHIFT), L1_TYPE_S|L1_S_AP(AP_KRW))
151 MMU_INIT(SDRAM_START, SDRAM_START, 64, L1_TYPE_S|L1_S_C|L1_S_AP(AP_KRW))
153 MMU_INIT(0xc0000000, SDRAM_START, 64, L1_TYPE_S|L1_S_C|L1_S_AP(AP_KRW))
/netbsd-6-1-5-RELEASE/sys/arch/evbarm/beagle/
H A Dbeagle_start.S263 #define MMU_INIT(va,pa,n_sec,attr) \ define
271 MMU_INIT(KERNEL_BASE, KERNEL_BASE,
276 MMU_INIT(OMAP3530_L4_CORE_VBASE, OMAP3530_L4_CORE_BASE,
281 MMU_INIT(OMAP3530_L4_PERIPHERAL_VBASE, OMAP3530_L4_PERIPHERAL_BASE,
286 MMU_INIT(OMAP3530_L4_WAKEUP_VBASE, OMAP3530_L4_WAKEUP_BASE,
291 MMU_INIT(0, 0, 0, 0)
/netbsd-6-1-5-RELEASE/sys/arch/evbarm/gumstix/
H A Dgumstix_start.S239 #define MMU_INIT(va, pa, n_sec, attr) \ define
246 MMU_INIT(0x00000000, 0x00000000,
253 MMU_INIT(SDRAM_START, SDRAM_START,
257 MMU_INIT(0xc0000000, SDRAM_START,
264 MMU_INIT(KERNEL_BASE, SDRAM_START,
268 MMU_INIT(0, 0, 0, 0) /* end of table */
/netbsd-6-1-5-RELEASE/sys/arch/evbarm/rpi/
H A Drpi_start.S302 #define MMU_INIT(va,pa,n_sec,attr) \ define
310 MMU_INIT(0x0, 0x0,
314 MMU_INIT(KERNEL_BASE, 0x0,
319 MMU_INIT(RPI_KERNEL_IO_VBASE, RPI_KERNEL_IO_PBASE,
324 MMU_INIT(0, 0, 0, 0)
/netbsd-6-1-5-RELEASE/sys/arch/evbarm/tisdp24xx/
H A Dsdp24xx_start.S307 #define MMU_INIT(va,pa,n_sec,attr) \ define
315 MMU_INIT(KERNEL_BASE, KERNEL_BASE,
320 MMU_INIT(OMAP2430_L4_CORE_VBASE, OMAP2430_L4_CORE_BASE,
325 MMU_INIT(OMAP2430_L4_WAKEUP_VBASE, OMAP2430_L4_WAKEUP_BASE,
330 MMU_INIT(0, 0, 0, 0)
/netbsd-6-1-5-RELEASE/sys/arch/evbarm/netwalker/
H A Dnetwalker_start.S275 #define MMU_INIT(va,pa,n_sec,attr) \ define
282 MMU_INIT(0x00000000, 0x00000000,
287 MMU_INIT(SDRAM_START, SDRAM_START,
292 MMU_INIT(0xc0000000, SDRAM_START,
296 MMU_INIT(NETWALKER_IO_VBASE0, NETWALKER_IO_PBASE0,
301 MMU_INIT(0, 0, 0, 0)
/netbsd-6-1-5-RELEASE/sys/arch/hpcarm/hpcarm/
H A Dlocore.S133 #define MMU_INIT(va,pa,n_sec,attr) \ define
143 MMU_INIT(0x00000000, 0x00000000, 1<<(32-L1_S_SHIFT), L1_TYPE_S|L1_S_AP(AP_KRW))
145 MMU_INIT(0xa0000000, 0xa0000000, 256, L1_TYPE_S|L1_S_C|L1_S_AP(AP_KRW))
147 MMU_INIT(0xc0000000, 0xa0000000, 256, L1_TYPE_S|L1_S_C|L1_S_AP(AP_KRW))

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