Searched refs:DCR_MAL0_TXCTP0R (Results 1 - 2 of 2) sorted by relevance

/netbsd-6-1-5-RELEASE/sys/arch/powerpc/ibm4xx/dev/
H A Dmal.c253 mtdcr(DCR_MAL0_TXCTP0R, cdtxaddr);
/netbsd-6-1-5-RELEASE/sys/arch/powerpc/include/ibm4xx/
H A Ddcr4xx.h210 #define DCR_MAL0_TXCTP0R 0x1a0 /* Channel Tx 0 Channel Table Pointer Register */ macro

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