Searched refs:DCR_MAL0_CFG (Results 1 - 2 of 2) sorted by relevance

/netbsd-6-1-5-RELEASE/sys/arch/powerpc/ibm4xx/dev/
H A Dmal.c84 mtdcr(DCR_MAL0_CFG, MAL0_CFG_SR);
86 while (mfdcr(DCR_MAL0_CFG) & MAL0_CFG_SR) {
109 mtdcr(DCR_MAL0_CFG,
119 mtdcr(DCR_MAL0_CFG,
/netbsd-6-1-5-RELEASE/sys/arch/powerpc/include/ibm4xx/
H A Ddcr4xx.h130 #define DCR_MAL0_CFG 0x180 /* MAL Configuration Register */ macro

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