Searched refs:CLR_V_CHG_ZVC (Results 1 - 3 of 3) sorted by relevance
| /netbsd-6-1-5-RELEASE/external/gpl3/gdb/dist/sim/m68hc11/ |
| H A D | gencode.c | 60 #define CLR_V_CHG_ZVC 0,M6811_V_BIT,M6811_ZVC_BIT macro
466 { "lsr", "()->()", "lsr8", 3, 0x74, 6, 6, CLR_V_CHG_ZVC },
627 { "lsr", "(y)->(y)", "lsr8", 3, 0x64, 7, 7, CLR_V_CHG_ZVC },
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| /netbsd-6-1-5-RELEASE/external/gpl3/binutils/dist/opcodes/ |
| H A D | m68hc11-opc.c | 57 #define CLR_V_CHG_ZVC 0,M6811_V_BIT,M6811_ZVC_BIT macro
716 { "lsr", OP_IY | OP_PAGE2, 3, 0x64, 7, 7, CLR_V_CHG_ZVC, cpu6811 },
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| /netbsd-6-1-5-RELEASE/external/gpl3/gdb/dist/opcodes/ |
| H A D | m68hc11-opc.c | 57 #define CLR_V_CHG_ZVC 0,M6811_V_BIT,M6811_ZVC_BIT macro
716 { "lsr", OP_IY | OP_PAGE2, 3, 0x64, 7, 7, CLR_V_CHG_ZVC, cpu6811 },
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