Searched refs:AR_MIBC (Results 1 - 7 of 7) sorted by relevance

/netbsd-6-1-5-RELEASE/sys/external/isc/atheros_hal/dist/ar5210/
H A Dar5210reg.h46 #define AR_MIBC 0x0040 /* MIB control register */ macro
H A Dar5210_reset.c179 OS_REG_WRITE(ah, AR_MIBC, 0); /* unfreeze ctrs + clr state */
/netbsd-6-1-5-RELEASE/sys/external/isc/atheros_hal/dist/ar5212/
H A Dar5212_misc.c363 OS_REG_WRITE(ah, AR_MIBC,
370 OS_REG_WRITE(ah, AR_MIBC, AR_MIBC | AR_MIBC_CMC);
H A Dar5212_ani.c699 __func__, OS_REG_READ(ah, AR_MIBC),
H A Dar5212reg.h36 #define AR_MIBC 0x0040 /* MAC MIB control register */ macro
/netbsd-6-1-5-RELEASE/sys/external/isc/atheros_hal/dist/ar5211/
H A Dar5211reg.h41 #define AR_MIBC 0x0040 /* MIB control register */ macro
/netbsd-6-1-5-RELEASE/sys/external/isc/atheros_hal/dist/ar5416/
H A Dar5416_ani.c619 __func__, OS_REG_READ(ah, AR_MIBC),

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