Searched refs:ShiftAmount (Results 1 - 4 of 4) sorted by relevance
| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 612 static bool Is_PostInc_S4_Offset(SDNode * S, int ShiftAmount) { argument
619 if (ShiftAmount > 0) {
620 m = v % ShiftAmount;
621 v = v >> ShiftAmount;
654 // ShiftAmount = number of left-shifted bits in the Hexagon instruction.
655 int ShiftAmount = VT.getSizeInBits() / 16; local
656 if (isLegal && Is_PostInc_S4_Offset(Offset.getNode(), ShiftAmount)) {
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 612 uint64_t ShiftAmount = cast<ConstantSDNode>(N->getOperand(1))->getZExtValue(); local
619 if (Opc == ISD::SRL && ShiftAmount) {
623 ShiftAmount -= 1;
626 while (ShiftAmount--)
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 102 unsigned &ShiftAmount);
3525 const MCExpr *ShiftAmount; local
3527 if (getParser().ParseExpression(ShiftAmount)) {
3531 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(ShiftAmount);
3604 const MCExpr *ShiftAmount; local
3606 if (getParser().ParseExpression(ShiftAmount)) {
3610 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(ShiftAmount);
3665 const MCExpr *ShiftAmount; local
3667 if (getParser().ParseExpression(ShiftAmount)) {
3671 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(ShiftAmount);
[all...] |
| /macosx-10.9.5/llvmCore-3425.0.33/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeDAG.cpp | 394 SDValue ShiftAmount = DAG.getConstant(NumBits, local
397 SDValue Hi = DAG.getNode(ISD::SRL, dl, VT, Val, ShiftAmount);
552 SDValue ShiftAmount = DAG.getConstant(NumBits, local
554 SDValue Result = DAG.getNode(ISD::SHL, dl, VT, Hi, ShiftAmount);
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