Searched refs:Rd (Results 1 - 5 of 5) sorted by relevance

/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp1976 unsigned Rd = fieldFromInstruction(Insn, 8, 4); local
1985 if (!Check(S, DecoderGPRRegisterClass(Inst, Rd, Address, Decoder)))
1987 if (!Check(S, DecoderGPRRegisterClass(Inst, Rd, Address, Decoder)))
2000 unsigned Rd = fieldFromInstruction(Insn, 12, 4); local
2008 if (!Check(S, DecoderGPRRegisterClass(Inst, Rd, Address, Decoder)))
2010 if (!Check(S, DecoderGPRRegisterClass(Inst, Rd, Address, Decoder)))
2026 unsigned Rd = fieldFromInstruction(Insn, 16, 4); local
2035 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rd, Address, Decoder)))
2169 unsigned Rd = fieldFromInstruction(Insn, 12, 4); local
2170 Rd |
2443 unsigned Rd = fieldFromInstruction(Insn, 12, 4); local
2714 unsigned Rd = fieldFromInstruction(Insn, 12, 4); local
2761 unsigned Rd = fieldFromInstruction(Insn, 12, 4); local
2809 unsigned Rd = fieldFromInstruction(Insn, 12, 4); local
2844 unsigned Rd = fieldFromInstruction(Insn, 12, 4); local
2899 unsigned Rd = fieldFromInstruction(Insn, 12, 4); local
2944 unsigned Rd = fieldFromInstruction(Insn, 12, 4); local
2987 unsigned Rd = fieldFromInstruction(Insn, 12, 4); local
3577 unsigned Rd = fieldFromInstruction(Insn, 12, 4); local
3709 unsigned Rd = fieldFromInstruction(Insn, 12, 4); local
3776 unsigned Rd = fieldFromInstruction(Insn, 12, 4); local
3842 unsigned Rd = fieldFromInstruction(Insn, 12, 4); local
3909 unsigned Rd = fieldFromInstruction(Insn, 12, 4); local
3973 unsigned Rd = fieldFromInstruction(Insn, 12, 4); local
4043 unsigned Rd = fieldFromInstruction(Insn, 12, 4); local
4107 unsigned Rd = fieldFromInstruction(Insn, 12, 4); local
4188 unsigned Rd = fieldFromInstruction(Insn, 12, 4); local
[all...]
/macosx-10.9.5/cctools-845/as/
H A Darm.c4108 /* Case 4: VMOV<c><q>.<size> <Dn[x]>, <Rd>. */
4141 /* Case 5: VMOV<c><q> <Dm>, <Rd>, <Rn>.
4231 /* Case 6: VMOV<c><q>.<dt> <Rd>, <Dn[x]> */
4239 /* Case 7: VMOV<c><q> <Rd>, <Rn>, <Dm> */
5529 inst.instruction |= (inst.operands[0].reg << 12); /* Rd */
5546 inst.instruction |= (inst.operands[0].reg << 12); /* Rd */
5760 MRC{cond} <coproc>, <opcode_1>, <Rd>, <CRn>, <CRm>{, <opcode_2>}
5779 MCRR{cond} <coproc>, <opcode>, <Rd>, <Rn>, <CRm>.
5789 Result unpredicatable if Rd or Rn is R15. */
6057 /* ARM V6T2 16-bit immediate register load: MOV[WT]{cond} Rd, #<imm1
7420 int Rd, Rn; local
7436 int Rd, Rs, Rn; local
7665 int Rd, Rs, Rn; local
7748 int Rd, Rs, Rn; local
9166 int Rd, Rs; local
[all...]
/macosx-10.9.5/cxxfilt-11/cxxfilt/opcodes/
H A Di386-dis.c230 #define Rd OP_Rd, d_mode macro
878 { "movL", Rd, Td, XX, XX },
880 { "movL", Td, Rd, XX, XX },
/macosx-10.9.5/vim-53/runtime/
H A Dfiletype.vim1542 au BufNewFile,BufRead *.rd,*.Rd setf rhelp
/macosx-10.9.5/Heimdal-323.92.1/lib/hcrypto/libtommath/
H A Dtommath.tex74 111 Banning Rd

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