Searched refs:Insn (Results 1 - 6 of 6) sorted by relevance

/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp203 static DecodeStatus DecodeBitfieldMaskOperand(MCInst &Inst, unsigned Insn,
205 static DecodeStatus DecodeCopMemInstruction(MCInst &Inst, unsigned Insn,
208 unsigned Insn,
211 static DecodeStatus DecodeSORegMemOperand(MCInst &Inst, unsigned Insn,
213 static DecodeStatus DecodeAddrMode3Instruction(MCInst &Inst,unsigned Insn,
215 static DecodeStatus DecodeSORegImmOperand(MCInst &Inst, unsigned Insn,
217 static DecodeStatus DecodeSORegRegOperand(MCInst &Inst, unsigned Insn,
221 unsigned Insn,
224 static DecodeStatus DecodeT2MOVTWInstruction(MCInst &Inst, unsigned Insn,
226 static DecodeStatus DecodeArmMOVTWInstruction(MCInst &Inst, unsigned Insn,
1293 DecodeCopMemInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1438 DecodeAddrMode2IdxInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1587 DecodeAddrMode3Instruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1778 DecodeRFEInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1807 DecodeMemMultipleWritebackInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1892 DecodeCPSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1932 DecodeT2CPSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1972 DecodeT2MOVTWInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1996 DecodeArmMOVTWInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2022 DecodeSMLAInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2095 DecodeT2BInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2122 DecodeBranchImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2165 DecodeVLDInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2439 DecodeVSTInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2710 DecodeVLD1DupInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2757 DecodeVLD2DupInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2805 DecodeVLD3DupInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2840 DecodeVLD4DupInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2895 DecodeNEONModImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2940 DecodeVSHLMaxInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2983 DecodeTBLInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3019 DecodeThumbAddSpecialReg(MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) argument
3131 DecodeT2LoadShift(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3274 DecodeT2LdStPre(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3319 DecodeThumbAddSPImm(MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) argument
3330 DecodeThumbAddSPReg(MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) argument
3355 DecodeThumbCPS(MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) argument
3366 DecodePostIdxReg(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3413 DecodeThumbTableBranch(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3429 DecodeThumb2BCCInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3550 DecodeDoubleRegLoad(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3573 DecodeDoubleRegStore(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3600 DecodeLDRPreImm(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3625 DecodeLDRPreReg(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3653 DecodeSTRPreImm(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3678 DecodeSTRPreReg(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3703 DecodeVLD1LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3770 DecodeVST1LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3836 DecodeVLD2LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3903 DecodeVST2LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3967 DecodeVLD3LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4037 DecodeVST3LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4101 DecodeVLD4LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4182 DecodeVST4LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4254 DecodeVMOVSRR(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4280 DecodeVMOVRRS(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4306 DecodeIT(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4328 DecodeT2LDRDPreInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4365 DecodeT2STRDPreInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4399 DecodeT2Adr(MCInst &Inst, uint32_t Insn, uint64_t Address, const void *Decoder) argument
4425 DecodeSwap(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4452 DecodeVCVTD(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4480 DecodeVCVTQ(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
[all...]
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/Mips/Disassembler/
H A DMipsDisassembler.cpp132 unsigned Insn,
142 unsigned Insn,
157 unsigned Insn,
163 unsigned Insn,
168 unsigned Insn,
172 static DecodeStatus DecodeFMem(MCInst &Inst, unsigned Insn,
177 unsigned Insn,
182 unsigned Insn,
187 unsigned Insn,
192 unsigned Insn,
280 uint32_t Insn; local
305 uint32_t Insn; local
398 DecodeMem(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
420 DecodeFMem(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
450 DecodeCondCode(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
505 DecodeBC1(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
515 DecodeJumpTarget(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
526 DecodeSimm16(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
534 DecodeInsSize(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
545 DecodeExtSize(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
[all...]
/macosx-10.9.5/llvmCore-3425.0.33/utils/TableGen/
H A DPseudoLoweringEmitter.cpp55 CodeGenInstruction &Insn,
73 addDagOperandMapping(Record *Rec, DagInit *Dag, CodeGenInstruction &Insn, argument
92 if (DI->getDef() != Insn.Operands[BaseIdx + i].Rec)
96 Insn.Operands[BaseIdx + i].Rec->getName() + "'");
100 for (unsigned I = 0, E = Insn.Operands[i].MINumOperands; I != E; ++I)
102 OpsAdded += Insn.Operands[i].MINumOperands;
111 addDagOperandMapping(Rec, SubDag, Insn, OperandMap, BaseIdx + i);
139 CodeGenInstruction Insn(Operator);
141 if (Insn.isCodeGenOnly || Insn
[all...]
H A DFixedLenDecoderEmitter.cpp374 void insnWithID(insn_t &Insn, unsigned Opcode) const { argument
387 Insn.push_back(BIT_UNSET);
389 Insn.push_back(bitFromBits(Bits, i));
403 bool fieldFromInsn(uint64_t &Field, insn_t &Insn, unsigned StartBit,
434 const insn_t &Insn) const;
511 insn_t Insn; local
514 Owner->insnWithID(Insn, Owner->Opcodes[i]);
518 bool ok = Owner->fieldFromInsn(Field, Insn, StartBit, NumBits);
926 bool FilterChooser::fieldFromInsn(uint64_t &Field, insn_t &Insn,
931 if (Insn[StartBi
[all...]
/macosx-10.9.5/JavaScriptCore-7537.78.1/disassembler/udis86/
H A Dud_opcode.py102 class Insn: class in class:UdOpcodeTables
213 insn = self.Insn(prefixes=prefixes,
/macosx-10.9.5/llvmCore-3425.0.33/lib/Transforms/Scalar/
H A DCodeGenPrepare.cpp402 Instruction *Insn = dyn_cast<Instruction>(UPN->getIncomingValue(I)); local
403 if (Insn && Insn->getParent() == BB &&
404 Insn->getParent() != UPN->getIncomingBlock(I))
1433 Instruction *Insn = BI; ++BI; local
1434 DbgValueInst *DVI = dyn_cast<DbgValueInst>(Insn);
1436 PrevNonDbgInst = Insn;

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