Searched refs:ADC (Results 1 - 7 of 7) sorted by relevance
/macosx-10.9.5/JavaScriptCore-7537.78.1/assembler/ |
H A D | ARMAssembler.h | 134 ADC = (0x5 << 21), enumerator in enum:JSC::ARMAssembler::__anon2640 323 emitInstruction(toARMWord(cc) | ADC, rd, rn, op2); 328 emitInstruction(toARMWord(cc) | ADC | SetConditionalCodes, rd, rn, op2);
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/macosx-10.9.5/vim-53/runtime/syntax/ |
H A D | a65.vim | 65 syn match a65Opcode "\<ADC\($\|\s\)" nextgroup=a65Address
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H A D | tasm.vim | 41 syn keyword tasmInstruction AAA AAD AAM AAS ADC ADD AND ARPL BOUND BSF BSR
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H A D | masm.vim | 192 syn keyword masmOpcode AAA AAD AAM AAS ADC ADD AND CALL CBW CLC CLD
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H A D | nasm.vim | 299 syn keyword nasmStdInstruction AAA AAD AAM AAS ADC ADD AND
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/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/X86/ |
H A D | X86ISelLowering.h | 252 ADD, SUB, ADC, SBB, SMUL, enumerator in enum:llvm::X86ISD::NodeType
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H A D | X86ISelLowering.cpp | 9011 Opc == X86ISD::ADC || 11363 case ISD::ADDE: Opc = X86ISD::ADC; ExtraOp = true; break; 11741 case X86ISD::ADC: return "X86ISD::ADC"; 13497 case X86ISD::ADC: 16124 // Optimize RES, EFLAGS = X86ISD::ADC LHS, RHS, EFLAGS 16127 // If the LHS and RHS of the ADC node are zero, then it can't overflow and 16181 return DAG.getNode(N->getOpcode() == ISD::SUB ? X86ISD::ADC : X86ISD::SBB, 16184 return DAG.getNode(N->getOpcode() == ISD::SUB ? X86ISD::SBB : X86ISD::ADC, 16250 case X86ISD::ADC [all...] |
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