/macosx-10.5.8/xnu-1228.15.4/osfmk/ppc/commpage/ |
H A D | memset_g5.s | 84 lvx v0,0,r9 // load the pattern into v0 94 stvx v0,0,r8 121 stvx v0,0,r8 122 stvx v0,r5,r8 123 stvx v0,r6,r8 124 stvx v0,r9,r8 126 stvx v0,0,r10 127 stvx v0,r5,r10 128 stvx v0,r [all...] |
H A D | memset_g4.s | 68 lvx v0,0,r9 // load the pattern into v0 76 stvx v0,0,r8 // store another 16 bytes to align 99 stvx v0,0,r8 100 stvx v0,r5,r8 101 stvx v0,r6,r8 102 stvx v0,r9,r8 108 stvx v0,0,r8 109 stvx v0,r5,r8 110 stvx v0,r [all...] |
H A D | bigcopy_970.s | 167 lvsl v0,0,rs // get permute vector for left shift 199 vperm v17,v1,v2,v0 202 vperm v18,v2,v3,v0 205 vperm v19,v3,v4,v0 208 vperm v20,v4,v5,v0 214 vperm v21,v5,v6,v0 216 vperm v22,v6,v7,v0 218 vperm v23,v7,v8,v0 220 vperm v17,v8,v9,v0 222 vperm v18,v9,v10,v0 [all...] |
H A D | bcopy_970.s | 47 * v0 = permute vector ("vp") 69 #define vp v0 305 oris w4,rv,0xFFF8 // we use v0-v12 371 oris w4,rv,0xFFF8 // we use v0-v12 508 oris w1,rv,0xFFF8 // we use v0-v12
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H A D | bcopy_g4.s | 53 * v0 = permute vector ("vp") 83 #define vp v0 346 oris w1,rv,0xFF00 // we use v0-v7 538 oris w1,rv,0xFF00 // we use v0-v7
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/macosx-10.5.8/xnu-1228.15.4/osfmk/ppc/ |
H A D | AltiAssist.s | 77 stvxl v0,r10,r2 ; Save V0 79 vspltisw v0,1 ; Set a 1 in V0 81 vslw v0,v0,v1 ; Shift half way 82 vslw v0,v0,v1 ; Shift the rest of the way (we now have 0x00010000) 84 vor v1,v1,v0 ; Turn off Java mode 85 lvxl v0,r10,r2 ; Restore V0
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H A D | start.s | 389 vspltisw v0,1 ; Turn on the saturate bit 390 vxor v1,v1,v0 ; Turn off saturate and leave non-Java set 391 lvx v0,br0,r5 ; Initialize VR0 393 vor v2,v0,v0 ; Copy into the next register 394 vor v1,v0,v0 ; Copy into the next register 395 vor v3,v0,v0 ; Copy into the next register 396 vor v4,v0,v [all...] |
H A D | movc.s | 240 stvx v0,0,r9 // save some VRs so we can use to copy 260 lvx v0,0,r3 // offset 0 266 stvx v0,0,r4 // offset 0 289 lvx v0,0,r9 // restore the VRs 312 stvx v0,0,r9 // save 8 VRs so we can copy wo bubbles 337 lvx v0,0,r3 // offset 0 347 stvx v0,0,r4 // offset 0 374 lvx v0,0,r9 // restore the VRs
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H A D | db_low_trace.c | 377 unsigned int v0, v1, st0, st1; local 400 v0 = (pmap->pmapCCtl >> (31 - i) & 1); /* Get high order bit */ 406 v0, st0, pmap->pmapSegCache[i].sgcESID, pmap->pmapSegCache[i].sgcVSID,
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H A D | cswtch.s | 1623 vor v0,v31,v31 ; Copy into the next register 1725 vspltisw v0,1 ; Turn on the saturate bit 1726 vxor v1,v1,v0 ; Turn off saturate 1828 vor v0,v0,v0 ; Use vectors 1992 stvxl v0,0,r11 ; save 8 VRs in the line 2053 stvxl v0,0,r11 ; save the two VRs in the line 2237 vor v0,v31,v31 ; no VR must be loaded, so bug them all 2247 lvxl v0, [all...] |
H A D | lowmem_vectors.s | 1931 stvxl v0,r10,r2 ; Save a register 1934 mfvscr v0 ; Get the vector status register 1936 stvxl v0,0,r28 ; Save the vector status 1937 vspltisw v0,1 ; Turn on the saturate bit 1938 vxor v1,v1,v0 ; Turn off saturate 1942 lvxl v0,r10,r2 ; Restore first work register 3230 stvxl v0,r21,r29 ; Save a vector register 3231 lvxl v0,0,r28 ; Get the vector status 3233 mtvscr v0 ; Set the vector status 3234 lvxl v0,r2 [all...] |
H A D | Firmware.s | 2099 stvxl v0,0,r5
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/macosx-10.5.8/xnu-1228.15.4/bsd/crypto/aes/ppc/ |
H A D | aestab.h | 135 d_1(aes_32t, t_dec(i,n), isb_data, v0); 138 d_4(aes_32t, t_dec(i,n), isb_data, v0, v1, v2, v3); 165 d_1(aes_32t, t_dec(i,m), mm_data, v0); 168 d_4(aes_32t, t_dec(i,m), mm_data, v0, v1, v2, v3);
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H A D | aestab.c | 163 #define v0(p) bytes2word(fe(p), f9(p), fd(p), fb(p)) macro
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