Searched refs:reg (Results 1 - 25 of 40) sorted by relevance

12

/macosx-10.5.8/xnu-1228.15.4/pexpert/pexpert/ppc/
H A Dpowermac.h54 #define reg8(reg) (*(v_u_char *)reg)
55 #define reg16(reg) (*(v_u_short *)reg)
56 #define reg32(reg) (*(v_u_int *)reg)
H A Dprotos.h31 #define mtsprg(n, reg) __asm__ volatile("mtsprg " # n ", %0" : : "r" (reg))
32 #define mfsprg(reg, n) __asm__ volatile("mfsprg %0, " # n : "=r" (reg))
35 #define mfspr(reg, spr) __asm__ volatile("mfspr %0, " # spr : "=r" (reg))
/macosx-10.5.8/xnu-1228.15.4/osfmk/ppc/
H A Dppc_disasm.i13 $reg($d),{$simm16($i)|$shifted16($i)}[$s]
15 in 011111dddddaaaaabbbbb0110111100r {or{|.}[$r] $reg($a),$reg($b),$reg($d)|\
16 mr{|.}[$r] $reg($a),$reg($d)}[$b == $d]
17 in 011111dddddaaaaabbbbb0100111100r xor{|.}[$r] $reg($a),$reg($b),$reg($d)
20 in 011111ddddd011111111000100100000 mtcr $reg(
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H A Dproc_reg.h124 /* seg reg values must be simple expressions so that assembler can cope */
394 #define mtsprg(n, reg) __asm__ volatile("mtsprg " # n ", %0" : : "r" (reg))
395 #define mfsprg(reg, n) __asm__ volatile("mfsprg %0, " # n : "=r" (reg))
398 #define mfspr(reg, spr) __asm__ volatile("mfspr %0, " # spr : "=r" (reg))
H A Dcache.s76 rlwinm r3,r3,0,1,0 ; Duplicate high half of long long paddr into top of reg
104 rlwinm r3,r3,0,1,0 ; Duplicate high half of long long paddr into top of reg
131 rlwinm r3,r3,0,1,0 ; Duplicate high half of long long paddr into top of reg
201 rlwinm r3,r3,0,1,0 ; Duplicate high half of long long paddr into top of reg
288 rlwinm r3,r3,0,1,0 ; Duplicate high half of long long paddr into top of reg
346 rlwinm r3,r3,0,1,0 ; Duplicate high half of long long paddr into top of reg
H A Dmachine_routines.h314 uint32_t reg,
318 uint32_t reg,
H A Dscc_8530.h104 #define scc_read_reg(regs,chan,reg,val) { \
105 scc_set_datum(regs, ((chan)<<1),reg); \
113 #define scc_write_reg(regs,chan,reg,val) { \
114 scc_set_datum(regs, ((chan)<<1),reg); \
145 #define SCC_WR0 0 /* reg select, and commands */
409 /* software copy of some write regs, for reg |= */
H A Dhibernate_restore.s105 rlwinm r3,r3,0,1,0 ; Duplicate high half of long long paddr into top of reg
107 rlwinm r4,r5,0,1,0 ; Duplicate high half of long long paddr into top of reg
/macosx-10.5.8/xnu-1228.15.4/osfmk/i386/
H A Dasm.h203 * Gotoff2 allows you to reference local labels with an index reg.
204 * Gotoff3 allows you to reference local labels with an index reg & size.
221 #define Gcmp(lab,reg) cmpl $lab,reg
222 #define Gmemload(lab,reg) movl lab,reg
223 #define Gmemstore(reg,lab,tmp) movl reg,lab
236 #define Gcmp(lab,reg) cmpl reg,la
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H A Dlapic.h184 #define LAPIC_WRITE(reg,val) \
185 *((volatile uint32_t *)(lapic_start + LAPIC_##reg)) = (val)
186 #define LAPIC_READ(reg) \
187 (*((volatile uint32_t *)(lapic_start + LAPIC_##reg)))
188 #define LAPIC_READ_OFFSET(reg,off) \
189 (*((volatile uint32_t *)(lapic_start + LAPIC_##reg + (off))))
H A Dcpuid.c67 uint32_t reg[4]; local
119 reg[eax] = 4; /* cpuid request 4 */
120 reg[ecx] = index; /* index starting at 0 */
121 cpuid(reg);
122 //kprintf("cpuid(4) index=%d eax=%p\n", index, reg[eax]);
123 cache_type = bitfield(reg[eax], 4, 0);
126 cache_level = bitfield(reg[eax], 7, 5);
127 cache_sharing = bitfield(reg[eax], 25, 14) + 1;
129 = bitfield(reg[eax], 31, 26) + 1;
130 cache_linesize = bitfield(reg[eb
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H A Dcswitch.s73 #define CX(addr, reg) addr(,reg,4)
/macosx-10.5.8/xnu-1228.15.4/EXTERNAL_HEADERS/architecture/i386/
H A Dasm_help.h298 #define REG_TO_EXTERN(reg, var) \
300 movl reg, (%edx) ; \
303 #define EXTERN_TO_REG(var, reg) \
307 movl L ## var ##$non_lazy_ptr-1b(%edx),reg ; \
316 #define REG_TO_EXTERN(reg, var) movl reg, var
317 #define EXTERN_TO_REG(var, reg) movl $ ## var, reg
/macosx-10.5.8/xnu-1228.15.4/EXTERNAL_HEADERS/architecture/ppc/
H A Dasm_help.h424 #define REG_TO_EXTERN(reg, var) \
426 stw reg, 0(PICIFY_REG) @\
429 #define EXTERN_TO_REG(reg, var) \
431 lwz reg, 0(PICIFY_REG) @\
445 #define REG_TO_EXTERN(reg, var) \
447 stw reg, lo16(var)(TMP_REG)
449 #define EXTERN_TO_REG(reg, var) \
450 lis reg, ha16(var) @\
451 lwz reg, lo16(var)(reg)
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/macosx-10.5.8/xnu-1228.15.4/bsd/dev/i386/
H A Ddis_tables.c147 LSEG, /* for 3-bit seg reg encoding */
502 *bit pattern: 0000 1111 1100 1reg
1242 #define REX_R 0x04 /* high order bit extension of ModRM reg field */
1244 #define REX_B 0x01 /* extends ModRM r_m, SIB base, or opcode reg */
1268 #define MM_OPND 2 /* "value" used to indicate a mmx reg */
1269 #define XMM_OPND 3 /* "value" used to indicate a xmm reg */
1270 #define SEG_OPND 4 /* "value" used to indicate a segment reg */
1271 #define CONTROL_OPND 5 /* "value" used to indicate a control reg */
1272 #define DEBUG_OPND 6 /* "value" used to indicate a debug reg */
1273 #define TEST_OPND 7 /* "value" used to indicate a test reg */
1330 dtrace_get_modrm(dis86_t *x, uint_t *mode, uint_t *reg, uint_t *r_m) argument
1345 dtrace_rex_adjust(uint_t rex_prefix, uint_t mode, uint_t *reg, uint_t *r_m) argument
1719 uint_t reg; /* reg value from ModRM byte */ local
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H A Dfasttrap_isa.c81 #define FASTTRAP_MODRM(mod, reg, rm) (((mod) << 6) | ((reg) << 3) | (rm))
404 uint_t reg = FASTTRAP_MODRM_REG(instr[start + 1]); local
407 if (reg == 2 || reg == 4) {
410 if (reg == 2)
598 uint_t reg = FASTTRAP_MODRM_REG(instr[rmindex]); local
607 * the reg field may determine the op code
613 if (reg != 0) {
627 FASTTRAP_MODRM(2, reg, r
1982 uint64_t* reg; local
2204 fasttrap_getreg(x86_saved_state_t *regs, uint_t reg) argument
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H A Ddtrace_isa.c145 dtrace_getreg(struct regs *savearea, uint_t reg) argument
152 if (reg > x86_SAVED_STATE64_COUNT - 1) {
156 return ((uint64_t *)(&(regs->ss_64.gs)))[reg];
159 if (reg > x86_SAVED_STATE32_COUNT - 1) {
163 return (uint64_t)((unsigned int *)(&(regs->ss_32.gs)))[reg];
/macosx-10.5.8/xnu-1228.15.4/bsd/dev/ppc/
H A Ddtrace_isa.c153 dtrace_getreg(struct regs *savearea, uint_t reg) argument
159 if (reg > 68) { /* beyond mmcr2 */
164 switch (reg) {
167 return (((uint64_t *)(&(regs->save_r0)))[reg]) & mask;
177 return (uint64_t)(((unsigned int *)(&(regs->save_cr)))[reg - 38]);
/macosx-10.5.8/xnu-1228.15.4/bsd/net/
H A Dif_stf.c219 struct ifnet_attach_proto_param reg; local
225 bzero(&reg, sizeof(reg));
226 reg.input = stf_media_input;
227 reg.pre_output = stf_pre_output;
229 stat = ifnet_attach_protocol(ifp, protocol_family, &reg);
H A Dif_gif.c218 struct ifnet_attach_proto_param reg; local
221 bzero(&reg, sizeof(reg));
222 reg.input = gif_input;
224 stat = ifnet_attach_protocol(ifp, protocol_family, &reg);
/macosx-10.5.8/xnu-1228.15.4/osfmk/chud/ppc/
H A Dchud_cpu_ppc.c47 #define mtsprg(n, reg) __asm__ volatile("mtsprg " # n ", %0" : : "r" (reg))
48 #define mfsprg(reg, n) __asm__ volatile("mfsprg %0, " # n : "=r" (reg))
52 #define mtspr(spr, reg) __asm__ volatile ("mtspr %0, %1" : : "n" (spr), "r" (reg))
53 #define mfspr(reg, spr) __asm__ volatile("mfspr %0, %1" : "=r" (reg) : "n" (spr));
57 #define mtsr(sr, reg) __asm__ volatile("sync" "@" "mtsr sr%0, %1 " "@" "isync" : : "i" (sr), "r" (reg));
1163 chudxnu_scom_read(uint32_t reg, uint64_t *data) argument
1169 chudxnu_scom_write(uint32_t reg, uint64_t data) argument
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/macosx-10.5.8/xnu-1228.15.4/iokit/IOKit/pci/
H A DIOPCIDevice.h128 virtual IODeviceMemory * getDeviceMemoryWithRegister( UInt8 reg );
129 virtual IOMemoryMap * mapDeviceMemoryWithRegister( UInt8 reg,
/macosx-10.5.8/xnu-1228.15.4/pexpert/ppc/
H A Dpe_init.c68 static int PE_stub_write_IIC(__unused unsigned char addr, __unused unsigned char reg, argument
79 int (*PE_write_IIC)(unsigned char addr, unsigned char reg,
/macosx-10.5.8/AppleMacRiscPCI-3.4/
H A DAppleDART.cpp218 static inline void writeReg(volatile UInt32 *reg, UInt32 value) argument
220 *reg = value;
224 static inline UInt32 readReg(volatile UInt32 *reg) argument
226 return *reg;
/macosx-10.5.8/xnu-1228.15.4/pexpert/pexpert/
H A Dpexpert.h158 unsigned char reg,

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