Searched refs:MSR_SE_BIT (Results 1 - 4 of 4) sorted by relevance
| /macosx-10.5.8/xnu-1228.15.4/osfmk/ppc/ |
| H A D | proc_reg.h | 83 #define MSR_SE_BIT 21 macro
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| H A D | atomic_switch.s | 148 rlwinm r3,r3,0,MSR_BE_BIT+1,MSR_SE_BIT-1
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| H A D | Emulate64.s | 45 // CR bit set if interrupt occured in trace mode (ie, MSR_SE_BIT):
252 rlwinm. r0,r29,0,MSR_SE_BIT,MSR_SE_BIT // Were we single stepping?
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| H A D | Emulate.s | 239 rlwinm. r0,r22,0,MSR_SE_BIT,MSR_SE_BIT ; Were we single stepping?
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