/macosx-10.5.8/xnu-1228.15.4/osfmk/kdp/ml/ppc/ |
H A D | kdp_asm.s | 49 ori r2,r2,lo16(MASK(MSR_EE)|MASK(MSR_FP)) ; Get FP and EE 51 andc r7,r7,r2 ; Clear FP, VEC, and EE 80 ori r2,r2,lo16(MASK(MSR_EE)|MASK(MSR_FP)) ; Get FP and EE 82 andc r0,r0,r2 ; Clear FP, VEC, and EE
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/macosx-10.5.8/xnu-1228.15.4/osfmk/ppc/ |
H A D | db_asm.s | 55 andc r6,r6,r7 ; Force FP and vec off
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H A D | misc_asm.s | 64 ori r8,r8,lo16(MASK(MSR_EE)|MASK(MSR_FP)) ; Add the FP flag 66 andc r7,r7,r8 ; Clear VEC and FP 92 ori r8,r8,lo16(MASK(MSR_EE)|MASK(MSR_FP)) ; Add the FP flag
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H A D | hw_lock.s | 200 ori r0,r0,lo16(MASK(MSR_FP)) ; Get FP enable 202 andc r9,r9,r0 ; Clear FP and VEC 342 ori r0,r0,lo16(MASK(MSR_FP)) ; Get FP enable 344 andc r9,r9,r0 ; Clear FP and VEC 477 ori r0,r0,lo16(MASK(MSR_FP)) ; Get FP enable 479 andc r9,r9,r0 ; Clear FP and VEC 936 ori r0,r0,lo16(MASK(MSR_FP)) ; Get FP enable 938 andc r9,r9,r0 ; Clear FP and VEC 1049 ori r0,r0,lo16(MASK(MSR_FP)) ; Get FP enable 1051 andc r9,r9,r0 ; Clear FP an [all...] |
H A D | machine_routines_asm.s | 95 ori r0,r0,lo16(MASK(MSR_DR)+MASK(MSR_FP)) // always turn off DR and FP bit 159 ori r8,r8,lo16(MASK(MSR_FP)) ; Add the FP flag 162 andc r0,r0,r8 ; Clear VEC and FP 166 andc r2,r0,r8 ; Clear VEC, FP, and EE 304 mfmsr r10 ; Refresh our view of the MSR (VMX/FP may have changed) 627 ori r8,r8,lo16(MASK(MSR_FP)) ; Add the FP flag 629 andc r10,r10,r8 ; Clear VEC and FP 632 andc r9,r10,r9 ; Clear VEC, FP, DR, and EE 671 mtmsr r10 ; Restore entry MSR (sans FP and VEC) 685 rdwrpcok: mtmsrd r10 ; Restore entry MSR (sans FP an [all...] |
H A D | Firmware.s | 223 ori r2,r2,lo16(MASK(MSR_FP)) ; Get the FP enable 225 andc r0,r0,r2 ; Clear VEC and FP enables 1826 stfd f0,GDfp0(r31) /* Save FP */ 1827 stfd f1,GDfp1(r31) /* Save FP */ 1828 stfd f2,GDfp2(r31) /* Save FP */ 1829 stfd f3,GDfp3(r31) /* Save FP */ 1921 lfd f0,GDfp0(r31) /* Restore FP */ 1922 lfd f1,GDfp1(r31) /* Restore FP */ 1923 lfd f2,GDfp2(r31) /* Restore FP */ 1924 lfd f3,GDfp3(r31) /* Restore FP */ [all...] |
H A D | hw_exception.s | 233 ori r10,r10,lo16(MASK(MSR_FP)|MASK(MSR_EE)) ; Add in FP and EE 234 andc r7,r7,r10 ; Turn off VEC, FP, and EE 678 ori r10,r10,lo16(MASK(MSR_FP)|MASK(MSR_EE)) ; Add in FP and EE 679 andc r12,r12,r10 ; Turn off VEC, FP, and EE 783 ori r10,r10,lo16(MASK(MSR_FP)|MASK(MSR_EE)) ; Add in FP and EE 784 andc r3,r3,r10 ; Turn off VEC, FP, and EE 1035 ori r10,r10,lo16(MASK(MSR_FP)|MASK(MSR_EE)) ; Add in FP and EE 1036 andc r0,r0,r10 ; Turn off VEC, FP, and EE
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H A D | cswtch.s | 177 rlwinm r6,r6,0,MSR_FP_BIT+1,MSR_FP_BIT-1 ; Turn off the FP 389 ori r2,r2,lo16(MASK(MSR_FP)) ; Get FP 392 andc r0,r0,r2 ; Clear FP, VEC 546 lis r3,hi16(EXT(fpu_trap_count)) ; Get address of FP trap counter 547 ori r3,r3,lo16(EXT(fpu_trap_count)) ; Get address of FP trap counter 581 mr. r22,r22 ; See if there is any live FP status 1021 ori r0,r0,lo16(MASK(MSR_FP)) ; Add in FP 1023 andc r9,r9,r0 ; Force off VEC and FP 1100 ori r2,r2,lo16(MASK(MSR_FP)) ; Add in FP 1101 andc r0,r0,r2 ; Force off VEC and FP [all...] |
H A D | Emulate.s | 254 lis r29,hi16(EXT(aaFPopTable)) ; High part of FP branch table 257 ori r29,r29,lo16(EXT(aaFPopTable)) ; Low part of FP branch table 261 bt iStore,aaFPstore ; This is an FP store... 286 bctrl ; Go set the target FP register 296 aaFPstore: bctrl ; Go save the source FP register
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H A D | movc.s | 166 ori r2,r2,lo16(MASK(MSR_FP)) ; Add the FP flag 175 ori r2,r2,MASK(MSR_FP) // must enable FP for G3... 178 mtmsr r2 // turn EE off, FP and VEC on 1081 andc r26,r26,r0 // turn off VEC and FP in saved copy
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H A D | vmachmon_asm.s | 1699 rlwimi r5,r4,0,MSR_FP_BIT,MSR_FP_BIT ; Propagate guest FP 1742 rlwimi r5,r4,0,MSR_FP_BIT,MSR_FP_BIT ; Propagate guest FP 2091 rlwimi r4,r6,0,MSR_FP_BIT,MSR_FP_BIT ; Propagate guest FP 2276 rlwimi r4,r6,0,MSR_FP_BIT,MSR_FP_BIT ; Propagate guest FP
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H A D | lowmem_vectors.s | 1912 ; FP is disabled. We need to clear the FPSCR when we first start running in the 2976 rlwimi r4,r5,0,MSR_FP_BIT,MSR_FP_BIT ; Copy the new FP enable bit into the old SRR1
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H A D | hw_vm.s | 4860 ori r8,r8,lo16(MASK(MSR_FP)) ; Add in FP 4862 andc r10,r10,r8 ; Turn off VEC, FP for good 4865 isync ; Make sure FP and vec are off 5677 ori r0,r0,lo16(MASK(MSR_FP)) ; Get the FP as well 5681 andc r11,r11,r0 ; Clear VEC and FP for good 8683 ori r2,r2,0x2000 ; Get FP
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/macosx-10.5.8/xnu-1228.15.4/bsd/crypto/des/ |
H A D | des_enc.c | 159 FP(r,l); 271 FP(r,l); 291 FP(r,l);
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H A D | des_locl.h | 304 /* IP and FP 335 Thanks for hints from Richard Outerbridge - he told me IP&FP 355 #define FP(l,r) \ macro
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