Searched refs:DR (Results 1 - 10 of 10) sorted by relevance

/macosx-10.5.8/xnu-1228.15.4/osfmk/ppc/
H A Ddb_asm.s56 ori r7,r7,lo16(MASK(MSR_DR)) ; Set the DR bit
57 andc r7,r6,r7 ; Force DR off
H A DEmulate.s163 rlwinm r3,r23,32-MSR_DR_BIT+MSR_IR_BIT,MSR_DR_BIT,MSR_DR_BIT ; Move IR to DR for ifetch
165 rlwimi r3,r23,32-MSR_RI_BIT+MSR_DR_BIT,MSR_RI_BIT,MSR_RI_BIT ; Move DR to RI for ifetch
168 or r3,r23,r3 ; Turn on the DR and RI bit if translation was on
171 mtmsr r3 ; Flip RI and, if IR was set, DR
251 rlwinm r22,r22,0,MSR_DR_BIT,MSR_DR_BIT ; Move rupt DR to DR for ifetch
253 rlwimi r22,r22,32-MSR_RI_BIT+MSR_DR_BIT,MSR_RI_BIT,MSR_RI_BIT ; Move DR to RI for i-fetch
255 or r22,r30,r22 ; Set the DR and RI bits if translation was on
268 mtmsr r22 ; Flip DR, RI
306 mtmsr r22 ; Flip DR, R
[all...]
H A Dmachine_routines_asm.s37 * ml_set_physical() -- turn off DR and (if 64-bit) turn SF on
39 * ml_set_physical_get_ffs() -- turn DR off, SF on, and get feature flags
40 * ml_set_physical_disabled() -- turn DR and EE off, SF on, get feature flags
41 * ml_set_translation_off() -- turn DR, IR, and EE off, SF on, get feature flags
62 andc r2,r11,r0 // turn off EE, IR, and DR
95 ori r0,r0,lo16(MASK(MSR_DR)+MASK(MSR_FP)) // always turn off DR and FP bit
96 andc r2,r11,r0 // turn off DR and maybe EE
164 ori r8,r8,lo16(MASK(MSR_EE)|MASK(MSR_IR)|MASK(MSR_DR)) ; Drop EE, IR, and DR
306 ori r0,r0,lo16(MASK(MSR_IR)|MASK(MSR_DR)) ; Get the IR and DR bits
309 andc r10,r10,r0 ; Clear IR and DR
[all...]
H A Dbcopy.s127 bl EXT(bcopy) ; BATs set up, args in r3-r5, so do the copy with DR on
177 ori r6,r6,lo16(MASK(MSR_FP)|MASK(MSR_DR)) ; Add in FP and DR
178 andc r9,r9,r6 ; unconditionally turn DR, VEC, and FP off
183 mtmsr r9 ; turn DR, FP, and VEC off
198 ; 64-bit: turn DR off and SF on.
201 ori r8,r9,lo16(MASK(MSR_DR)) ; make a copy with DR back on... this is what we return to caller
214 bl EXT(bcopy) ; do copy with DR off and SF on, cache enabled
229 ; We need to copy with DR off, but one of the operands is in I/O space. To avoid wedging U3,
252 bl EXT(bcopy_nc) ; copy with SF on and EE, DR, VEC, and FP off, cache inhibited
H A DFirmware.s79 * This routine handles the firmware call routine. It must be entered with IR and DR off,
197 li r8,lo16(MASK(MSR_DR)) ; Get the DR bit
201 andc r8,r0,r8 ; Turn off EE and DR
214 mtmsr r8 /* Disable EE and DR */
842 ori r12,r12,0x0010 /* Turn on DR */
H A Dsavearea_asm.s788 * msr = IR, DR, and EE off, SF on
808 * address. We assume that IR, DR, and EE are all off, that SF is on, and:
879 * address. We assume that IR, DR, and EE are all off, and:
1579 andc r3,r11,r0 ; turn off IR, DR, and EE
H A Dlowmem_vectors.s3568 * ENTRY : IR and/or DR and/or interruptions can be on
3602 mtmsrd r30 ; Set 64-bit mode, turn off EE, DR, and IR
H A Dhw_vm.s5682 ori r0,r0,lo16(MASK(MSR_EE)|MASK(MSR_DR)|MASK(MSR_IR)) ; Get rid of EE, IR, and DR
5695 mtmsrd r0 ; set 64-bit mode, turn off EE, DR, and IR
8689 ori r2,r2,0x8030 ; Clear IR, DR and EE
/macosx-10.5.8/xnu-1228.15.4/osfmk/kdp/ml/ppc/
H A Dkdp_misc.s53 bl EXT(ml_set_physical_disabled) ; No DR and get 64-bit
/macosx-10.5.8/xnu-1228.15.4/osfmk/i386/
H A Ddb_disasm.c235 #define DR 17 /* debug register */ macro
329 /*21*/ { "mov", TRUE, LONG, op2(DR,E), 0 }, /* since mod == 11 */
331 /*23*/ { "mov", TRUE, LONG, op2(E,DR), 0 },
1475 case DR:

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