Searched refs:getNode (Results 1 - 25 of 80) sorted by relevance

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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/CellSPU/
H A DSPUISelLowering.cpp79 Op.getNode()->getValueType(0).getTypeForEVT(*DAG.getContext());
609 basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT,
629 rotate = DAG.getNode(ISD::ADD, dl, PtrVT,
648 basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, Op0, Op1);
654 basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, Op0, Op1);
657 basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT,
664 rotate = DAG.getNode(ISD::ADD, dl, PtrVT,
681 result = DAG.getNode(SPUISD::ROTBYTES_LEFT, dl, MVT::i128,
688 result = DAG.getNode(SPUISD::VEC2PREFSLOT, dl, InVT,
689 DAG.getNode(IS
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H A DSPUISelDAGToDAG.cpp120 return DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32,
135 return DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32,
182 (SPU::get_vec_i16imm(bvNode, *CurDAG, MVT::i16).getNode() != 0)) ||
184 ((SPU::get_vec_i16imm(bvNode, *CurDAG, MVT::i32).getNode() != 0) ||
185 (SPU::get_ILHUvec_imm(bvNode, *CurDAG, MVT::i32).getNode() != 0) ||
186 (SPU::get_vec_u18imm(bvNode, *CurDAG, MVT::i32).getNode() != 0) ||
187 (SPU::get_v4i32_imm(bvNode, *CurDAG).getNode() != 0))) ||
189 ((SPU::get_vec_i16imm(bvNode, *CurDAG, MVT::i64).getNode() != 0) ||
190 (SPU::get_ILHUvec_imm(bvNode, *CurDAG, MVT::i64).getNode() != 0) ||
191 (SPU::get_vec_u18imm(bvNode, *CurDAG, MVT::i64).getNode() !
[all...]
/macosx-10.10.1/llvmCore-3425.0.34/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorOps.cpp112 for (unsigned i = 0, e = Op.getNode()->getNumValues(); i != e; ++i)
123 SDNode* Node = Op.getNode();
131 SDValue(DAG.UpdateNodeOperands(Op.getNode(), Ops.data(), Ops.size()), 0);
134 LoadSDNode *LD = cast<LoadSDNode>(Op.getNode());
143 StoreSDNode *ST = cast<StoreSDNode>(Op.getNode());
256 if (Tmp1.getNode()) {
274 Result = DAG.UnrollVectorOp(Op.getNode());
295 assert(Op.getNode()->getNumValues() == 1 &&
303 Operands[j] = DAG.getNode(ISD::BITCAST, dl, NVT, Op.getOperand(j));
308 Op = DAG.getNode(O
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H A DDAGCombiner.cpp168 // SDValue.getNode() == 0 - No change was made
169 // SDValue.getNode() == N - N was replaced, is dead and has been handled.
482 return DAG.getNode(ISD::FSUB, Op.getDebugLoc(), Op.getValueType(),
487 return DAG.getNode(ISD::FSUB, Op.getDebugLoc(), Op.getValueType(),
501 return DAG.getNode(ISD::FSUB, Op.getDebugLoc(), Op.getValueType(),
512 return DAG.getNode(Op.getOpcode(), Op.getDebugLoc(), Op.getValueType(),
518 return DAG.getNode(Op.getOpcode(), Op.getDebugLoc(), Op.getValueType(),
525 return DAG.getNode(Op.getOpcode(), Op.getDebugLoc(), Op.getValueType(),
529 return DAG.getNode(ISD::FP_ROUND, Op.getDebugLoc(), Op.getValueType(),
568 if (isSetCCEquivalent(N, N0, N1, N2) && N.getNode()
[all...]
H A DLegalizeDAG.cpp167 ReplacedNode(Old.getNode());
315 SDValue Result = DAG.getNode(ISD::BITCAST, dl, intVT, Val);
356 StackPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr,
358 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr, Increment);
380 DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &Stores[0],
397 SDValue Hi = DAG.getNode(ISD::SRL, dl, VT, Val, ShiftAmount);
404 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
413 DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Store1, Store2);
438 SDValue Result = DAG.getNode(ISD::BITCAST, dl, LoadedVT, newLoad);
440 Result = DAG.getNode(V
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H A DLegalizeTypes.cpp44 // folding that occurs when using the DAG.getNode operators. Secondly, a new
102 assert(NewVal.getNode()->getNodeId() != NewNode &&
271 if (IgnoreNodeResults(N->getOperand(i).getNode()))
394 // the checking loop below. Implicit folding by the DAG.getNode operators and
416 if (!IgnoreNodeResults(I->getOperand(i).getNode()) &&
476 if (Op.getNode()->getNodeId() == Processed)
522 Val.setNode(AnalyzeNewNode(Val.getNode()));
523 if (Val.getNode()->getNodeId() == Processed)
558 assert(I->first.getNode() != N);
564 assert(I->first.getNode() !
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H A DLegalizeIntegerTypes.cpp143 if (Res.getNode())
156 return DAG.getNode(ISD::AssertSext, N->getDebugLoc(),
163 return DAG.getNode(ISD::AssertZext, N->getDebugLoc(),
220 return DAG.getNode(ISD::BITCAST, dl, NOutVT, GetPromotedInteger(InOp));
224 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, GetSoftenedFloat(InOp));
231 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT,
245 InOp = DAG.getNode(ISD::ANY_EXTEND, dl,
249 return DAG.getNode(ISD::BITCAST, dl, NOutVT, InOp);
256 return DAG.getNode(ISD::BITCAST, dl, NOutVT, GetWidenedVector(InOp));
259 return DAG.getNode(IS
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H A DLegalizeTypesGeneric.cpp54 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
55 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
61 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
62 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
68 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
69 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
74 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
75 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
82 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp,
84 Hi = DAG.getNode(IS
[all...]
H A DLegalizeVectorTypes.cpp124 if (R.getNode())
131 return DAG.getNode(N->getOpcode(), N->getDebugLoc(),
139 return DAG.getNode(N->getOpcode(), N->getDebugLoc(),
151 return DAG.getNode(ISD::BITCAST, N->getDebugLoc(),
161 return DAG.getNode(ISD::TRUNCATE, N->getDebugLoc(), EltVT, InOp);
177 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, N->getDebugLoc(),
185 return DAG.getNode(ISD::FP_ROUND, N->getDebugLoc(),
191 return DAG.getNode(ISD::FPOWI, N->getDebugLoc(),
202 Op = DAG.getNode(ISD::TRUNCATE, N->getDebugLoc(), EltVT, Op);
230 return DAG.getNode(
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H A DSelectionDAGBuilder.cpp134 Lo = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[0]);
135 Hi = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[1]);
141 Val = DAG.getNode(ISD::BUILD_PAIR, DL, RoundVT, Lo, Hi);
155 Hi = DAG.getNode(ISD::ANY_EXTEND, DL, TotalVT, Hi);
156 Hi = DAG.getNode(ISD::SHL, DL, TotalVT, Hi,
159 Lo = DAG.getNode(ISD::ZERO_EXTEND, DL, TotalVT, Lo);
160 Val = DAG.getNode(ISD::OR, DL, TotalVT, Lo, Hi);
167 Lo = DAG.getNode(ISD::BITCAST, DL, EVT(MVT::f64), Parts[0]);
168 Hi = DAG.getNode(ISD::BITCAST, DL, EVT(MVT::f64), Parts[1]);
171 Val = DAG.getNode(IS
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H A DResourcePriorityQueue.cpp79 const SDNode *ScegN = PredSU->getNode();
117 const SDNode *ScegN = SuccSU->getNode();
135 EVT VT = Op.getNode()->getValueType(Op.getResNo());
248 if (!SU || !SU->getNode())
253 if (SU->getNode()->getGluedNode())
258 if (SU->getNode()->isMachineOpcode())
259 switch (SU->getNode()->getMachineOpcode()) {
262 SU->getNode()->getMachineOpcode())))
293 if (!isResourceAvailable(SU) || SU->getNode()->getGluedNode()) {
298 if (SU->getNode()
[all...]
H A DSelectionDAGPrinter.cpp70 std::advance(NI, I.getNode()->getOperand(I.getOperand()).getResNo());
92 SDValue Op = EI.getNode()->getOperand(EI.getOperand());
129 if (G->getRoot().getNode())
130 GW.emitEdge(0, -1, G->getRoot().getNode(), G->getRoot().getResNo(),
273 if (SU->getNode()) {
275 for (SDNode *N = SU->getNode(); N; N = N->getGluedNode())
294 const SDNode *N = DAG->getRoot().getNode();
H A DTargetLowering.cpp1129 SDValue New = DAG.getNode(Op.getOpcode(), dl, VT, Op.getOperand(0),
1154 assert(Op.getNode()->getNumValues() == 1 &&
1159 if (!Op.getNode()->hasOneUse())
1173 SDValue X = DAG.getNode(Op.getOpcode(), dl, SmallVT,
1174 DAG.getNode(ISD::TRUNCATE, dl, SmallVT,
1175 Op.getNode()->getOperand(0)),
1176 DAG.getNode(ISD::TRUNCATE, dl, SmallVT,
1177 Op.getNode()->getOperand(1)));
1178 SDValue Z = DAG.getNode(ISD::ZERO_EXTEND, dl, Op.getValueType(), X);
1208 if (!Op.getNode()
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/macosx-10.10.1/llvmCore-3425.0.34/include/llvm/CodeGen/
H A DMachinePostDominators.h51 return DT->getNode(BB);
54 MachineDomTreeNode *getNode(MachineBasicBlock *BB) const { function in struct:llvm::MachinePostDominatorTree
55 return DT->getNode(BB);
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/ARM/
H A DARMSelectionDAGInfo.cpp67 DAG.getNode(ISD::ADD, dl, MVT::i32, Src,
74 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i);
79 DAG.getNode(ISD::ADD, dl, MVT::i32, Dst,
85 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i);
106 DAG.getNode(ISD::ADD, dl, MVT::i32, Src,
115 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i);
129 DAG.getNode(ISD::ADD, dl, MVT::i32, Dst,
136 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i);
171 Src = DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
173 Src = DAG.getNode(IS
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H A DARMISelLowering.cpp1210 Val = DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi);
1213 SDValue Vec = DAG.getNode(ISD::UNDEF, dl, MVT::v2f64);
1214 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, Vec, Val,
1225 Val = DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi);
1226 Val = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, Vec, Val,
1240 Val = DAG.getNode(ISD::BITCAST, dl, VA.getValVT(), Val);
1259 PtrOff = DAG.getNode(ISD::ADD, dl, getPointerTy(), StackPtr, PtrOff);
1273 SDValue fmrrd = DAG.getNode(ARMISD::VMOVRRD, dl,
1281 if (StackPtr.getNode() == 0)
1367 Arg = DAG.getNode(IS
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/X86/
H A DX86ISelLowering.cpp89 SDValue Result = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, ResultVT, Vec,
122 return DAG.getNode(ISD::INSERT_SUBVECTOR, dl, ResultVT, Result, Vec,
1409 return DAG.getNode(X86ISD::GlobalBaseReg, DebugLoc(), getPointerTy());
1529 ValToCopy = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), ValToCopy);
1531 ValToCopy = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), ValToCopy);
1533 ValToCopy = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), ValToCopy);
1535 ValToCopy = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), ValToCopy);
1558 ValToCopy = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f80, ValToCopy);
1569 ValToCopy = DAG.getNode(ISD::BITCAST, dl, MVT::i64, ValToCopy);
1570 ValToCopy = DAG.getNode(IS
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H A DX86ISelDAGToDAG.cpp85 return IndexReg.getNode() != 0 || Base_Reg.getNode() != 0;
93 dyn_cast_or_null<RegisterSDNode>(Base_Reg.getNode()))
107 if (Base_Reg.getNode() != 0)
108 Base_Reg.getNode()->dump();
114 if (IndexReg.getNode() != 0)
115 IndexReg.getNode()->dump();
260 if (AM.Segment.getNode())
368 if (Chain.getNode() == Load.getNode())
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/XCore/
H A DXCoreISelLowering.cpp184 case ISD::SUB: return ExpandADDSUB(Op.getNode(), DAG);
216 SDValue Cond = DAG.getNode(ISD::SETCC, dl, MVT::i32, Op.getOperand(2),
218 return DAG.getNode(ISD::SELECT, dl, MVT::i32, Cond, Op.getOperand(0),
229 return DAG.getNode(XCoreISD::PCRelativeWrapper, dl, MVT::i32, GA);
239 return DAG.getNode(XCoreISD::CPRelativeWrapper, dl, MVT::i32, GA);
241 return DAG.getNode(XCoreISD::DPRelativeWrapper, dl, MVT::i32, GA);
253 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::i32,
290 SDValue offset = DAG.getNode(ISD::MUL, dl, MVT::i32, BuildGetId(DAG, dl),
292 return DAG.getNode(ISD::ADD, dl, MVT::i32, base, offset);
303 return DAG.getNode(XCoreIS
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/macosx-10.10.1/llvmCore-3425.0.34/include/llvm/Analysis/
H A DPostDominators.h50 return DT->getNode(BB);
53 inline DomTreeNode *getNode(BasicBlock *BB) const { function in struct:llvm::PostDominatorTree
54 return DT->getNode(BB);
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/Sparc/
H A DSparcISelLowering.cpp137 if (Flag.getNode())
138 return DAG.getNode(SPISD::RET_FLAG, dl, MVT::Other, Chain,
140 return DAG.getNode(SPISD::RET_FLAG, dl, MVT::Other, Chain,
206 DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, LoVal, HiVal);
207 WholeValue = DAG.getNode(ISD::BITCAST, dl, MVT::f64, WholeValue);
215 Arg = DAG.getNode(ISD::BITCAST, dl, MVT::f32, Arg);
217 Arg = DAG.getNode(ISD::AssertSext, dl, MVT::i32, Arg,
219 Arg = DAG.getNode(ISD::TRUNCATE, dl, VA.getLocVT(), Arg);
261 DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, LoVal, HiVal);
262 WholeValue = DAG.getNode(IS
[all...]
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/PowerPC/
H A DPPCISelLowering.cpp552 else if (ISD::isEXTLoad(Op.getNode()) || ISD::isNON_EXTLoad(Op.getNode())) {
754 if (UniquedVals[i&(Multiple-1)].getNode() == 0)
769 if (UniquedVals[i].getNode() == 0) continue; // Must have been undefs.
776 if (UniquedVals[Multiple-1].getNode() == 0)
783 if (UniquedVals[Multiple-1].getNode() == 0)
796 if (OpVal.getNode() == 0)
802 if (OpVal.getNode() == 0) return SDValue(); // All UNDEF: use implicit def.
861 return isIntS16Immediate(Op.getNode(), Imm);
1204 SDValue Hi = DAG.getNode(PPCIS
[all...]
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/Mips/
H A DMipsISelLowering.cpp374 SDNode *ADDCNode = ADDENode->getOperand(2).getNode();
381 SDNode *MultNode = MultHi.getNode();
385 if (MultLo.getNode() != MultNode)
413 SDValue MAdd = CurDAG->getNode(MultOpc, dl, MVT::Glue,
447 SDNode *SUBCNode = SUBENode->getOperand(2).getNode();
454 SDNode *MultNode = MultHi.getNode();
458 if (MultLo.getNode() != MultNode)
486 SDValue MSub = CurDAG->getNode(MultOpc, dl, MVT::Glue,
548 SDValue DivRem = DAG.getNode(opc, dl, MVT::Glue,
629 return DAG.getNode(MipsIS
[all...]
/macosx-10.10.1/llvmCore-3425.0.34/include/llvm/CodeGen/PBQP/
H A DGraph.h111 NodeEntry& getNode(NodeItr nItr) { return *nItr; } function in class:PBQP::Graph
112 const NodeEntry& getNode(ConstNodeItr nItr) const { return *nItr; } function in class:PBQP::Graph
128 NodeEntry &n1 = getNode(ne.getNode1());
129 NodeEntry &n2 = getNode(ne.getNode2());
195 Vector& getNodeCosts(NodeItr nItr) { return getNode(nItr).getCosts(); }
201 return getNode(nItr).getCosts();
209 void setNodeData(NodeItr nItr, void *data) { getNode(nItr).setData(data); }
214 void* getNodeData(NodeItr nItr) { return getNode(nItr).getData(); }
244 return getNode(nItr).getDegree();
269 return getNode(nIt
[all...]
/macosx-10.10.1/llvmCore-3425.0.34/lib/Analysis/
H A DTypeBasedAliasAnalysis.cpp86 /// getNode - Get the MDNode for this TBAANode.
87 const MDNode *getNode() const { return Node; } function in class:__anon9914::TBAANode
179 if (T.getNode() == B)
185 if (!T.getNode())
191 if (T.getNode() == A)
197 if (!T.getNode())
205 if (RootA.getNode() != RootB.getNode())

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