/macosx-10.10.1/cxxfilt-11/cxxfilt/opcodes/ |
H A D | ia64-opc-i.c | 135 {"mov", I, OpX3X6 (0, 0, 0x31), {R1, B2}, EMPTY}, 140 {"mov", I, OpX3X6 (0, 0, 0x30), {R1, IP}, EMPTY}, 141 {"mov", I, OpX3X6 (0, 0, 0x33), {R1, PR}, EMPTY}, 144 {"mov.i", I, OpX3X6 (0, 0, 0x32), {R1, AR3}, EMPTY}, 145 {"zxt1", I, OpX3X6 (0, 0, 0x10), {R1, R3}, EMPTY}, 146 {"zxt2", I, OpX3X6 (0, 0, 0x11), {R1, R3}, EMPTY}, 147 {"zxt4", I, OpX3X6 (0, 0, 0x12), {R1, R3}, EMPTY}, 148 {"sxt1", I, OpX3X6 (0, 0, 0x14), {R1, R3}, EMPTY}, 149 {"sxt2", I, OpX3X6 (0, 0, 0x15), {R1, R3}, EMPTY}, 150 {"sxt4", I, OpX3X6 (0, 0, 0x16), {R1, R [all...] |
H A D | ia64-opc-m.c | 80 {"chk.a.nc", M0, OpX3 (0, 4), {R1, TGT25c}, EMPTY}, 81 {"chk.a.clr", M0, OpX3 (0, 5), {R1, TGT25c}, EMPTY}, 94 {"invala.e", M0, OpX3X4X2 (0, 0, 2, 1), {R1}, EMPTY}, 108 {"mov.m", M, OpX3X6b (1, 0, 0x22), {R1, AR3}, EMPTY}, 110 {"mov", M, OpX3X6b (1, 0, 0x24), {R1, CR3}, PRIV, 0, NULL}, 112 {"alloc", M, OpX3 (1, 6), {R1, AR_PFS, SOF, SOL, SOR}, FIRST|NO_PRED|MOD_RRBS, 0, NULL}, 113 {"alloc", M, OpX3 (1, 6), {R1, SOF, SOL, SOR}, PSEUDO|FIRST|NO_PRED|MOD_RRBS, 0, NULL}, 117 {"mov", M, OpX3X6b (1, 0, 0x25), {R1, PSR}, PRIV, 0, NULL}, 118 {"mov", M, OpX3X6b (1, 0, 0x21), {R1, PSR_UM}, EMPTY}, 119 {"probe.r", M, OpX3X6b (1, 0, 0x38), {R1, R [all...] |
H A D | v850-opc.c | 332 /* The R1 field in a format 1, 6, 7, or 9 insn. */ 333 #define R1 (UNUSED + 1) 337 #define R1_NOTR0 (R1 + 1) 487 #define IF1 {R1, R2} 496 #define IF6 {I16, R1, R2} 499 #define IF6U {I16U, R1, R2} 539 { "jmp", one (0x0060), one (0xffe0), {R1}, 1, PROCESSOR_ALL }, 568 { "ld.b", two (0x0700, 0x0000), two (0x07e0, 0x0000), {D16, R1, R2}, 1, PROCESSOR_ALL }, 569 { "ld.h", two (0x0720, 0x0000), two (0x07e0, 0x0001), {D16_15, R1, R2}, 1, PROCESSOR_ALL }, 570 { "ld.w", two (0x0720, 0x0001), two (0x07e0, 0x0001), {D16_15, R1, R 331 #define R1 macro [all...] |
H A D | ia64-opc-a.c | 94 {"add", A, OpX2aVeX4X2b (8, 0, 0, 0, 0), {R1, R2, R3}, EMPTY}, 95 {"add", A, OpX2aVeX4X2b (8, 0, 0, 0, 1), {R1, R2, R3, C1}, EMPTY}, 96 {"sub", A, OpX2aVeX4X2b (8, 0, 0, 1, 1), {R1, R2, R3}, EMPTY}, 97 {"sub", A, OpX2aVeX4X2b (8, 0, 0, 1, 0), {R1, R2, R3, C1}, EMPTY}, 98 {"addp4", A, OpX2aVeX4X2b (8, 0, 0, 2, 0), {R1, R2, R3}, EMPTY}, 99 {"and", A, OpX2aVeX4X2b (8, 0, 0, 3, 0), {R1, R2, R3}, EMPTY}, 100 {"andcm", A, OpX2aVeX4X2b (8, 0, 0, 3, 1), {R1, R2, R3}, EMPTY}, 101 {"or", A, OpX2aVeX4X2b (8, 0, 0, 3, 2), {R1, R2, R3}, EMPTY}, 102 {"xor", A, OpX2aVeX4X2b (8, 0, 0, 3, 3), {R1, R2, R3}, EMPTY}, 103 {"shladd", A, OpX2aVeX4 (8, 0, 0, 4), {R1, R [all...] |
/macosx-10.10.1/llvmCore-3425.0.34/unittests/VMCore/ |
H A D | MDBuilderTest.cpp | 49 MDNode *R1 = MDHelper.createRange(A, B); local 51 EXPECT_NE(R1, (MDNode *)0); 52 EXPECT_EQ(R1->getNumOperands(), 2U); 53 EXPECT_TRUE(isa<ConstantInt>(R1->getOperand(0))); 54 EXPECT_TRUE(isa<ConstantInt>(R1->getOperand(1))); 55 ConstantInt *C0 = cast<ConstantInt>(R1->getOperand(0)); 56 ConstantInt *C1 = cast<ConstantInt>(R1->getOperand(1)); 63 MDNode *R1 = MDHelper.createAnonymousTBAARoot(); local 64 EXPECT_NE(R0, R1); 66 EXPECT_GE(R1 75 MDNode *R1 = MDHelper.createTBAARoot("Root"); local [all...] |
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/CellSPU/ |
H A D | SPUFrameLowering.cpp | 126 .addReg(SPU::R1); 129 BuildMI(MBB, MBBI, dl, TII.get(SPU::STQDr32), SPU::R1).addImm(FrameSize) 130 .addReg(SPU::R1); 132 BuildMI(MBB, MBBI, dl, TII.get(SPU::AIr32), SPU::R1).addReg(SPU::R1) 139 .addReg(SPU::R1); 142 BuildMI(MBB, MBBI, dl, TII.get(SPU::STQXr32), SPU::R1) 144 .addReg(SPU::R1); 145 BuildMI(MBB, MBBI, dl, TII.get(SPU::Ar32), SPU::R1) 146 .addReg(SPU::R1) [all...] |
H A D | SPURegisterInfo.cpp | 55 case SPU::R1: return 1; 219 SPU::R1, /* stack pointer */ 228 R0 (link register), R1 (stack pointer) and R2 (environment pointer -- this is 234 Reserved.set(SPU::R1); // SP 291 SPOp.ChangeToRegister(SPU::R1, false); 305 .addReg(SPU::R1); 316 return SPU::R1;
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/macosx-10.10.1/OpenSSL098-52/src/crypto/md4/ |
H A D | md4_dgst.c | 134 R1(A,B,C,D,X( 0), 3,0x5A827999L); 135 R1(D,A,B,C,X( 4), 5,0x5A827999L); 136 R1(C,D,A,B,X( 8), 9,0x5A827999L); 137 R1(B,C,D,A,X(12),13,0x5A827999L); 138 R1(A,B,C,D,X( 1), 3,0x5A827999L); 139 R1(D,A,B,C,X( 5), 5,0x5A827999L); 140 R1(C,D,A,B,X( 9), 9,0x5A827999L); 141 R1(B,C,D,A,X(13),13,0x5A827999L); 142 R1(A,B,C,D,X( 2), 3,0x5A827999L); 143 R1( [all...] |
/macosx-10.10.1/OpenSSL098-52/src/crypto/md5/ |
H A D | md5_dgst.c | 134 R1(A,B,C,D,X( 1), 5,0xf61e2562L); 135 R1(D,A,B,C,X( 6), 9,0xc040b340L); 136 R1(C,D,A,B,X(11),14,0x265e5a51L); 137 R1(B,C,D,A,X( 0),20,0xe9b6c7aaL); 138 R1(A,B,C,D,X( 5), 5,0xd62f105dL); 139 R1(D,A,B,C,X(10), 9,0x02441453L); 140 R1(C,D,A,B,X(15),14,0xd8a1e681L); 141 R1(B,C,D,A,X( 4),20,0xe7d3fbc8L); 142 R1(A,B,C,D,X( 9), 5,0x21e1cde6L); 143 R1( [all...] |
/macosx-10.10.1/OpenSSL098-52/src/crypto/md5/asm/ |
H A D | md5-586.pl | 24 %Ltmp1=("R0",&Np($C), "R1",&Np($C), "R2",&Np($C), "R3",&Np($D)); 27 1, 6, 11, 0, 5, 10, 15, 4, 9, 14, 3, 8, 13, 2, 7, 12, # R1 61 &mov($tmp1,&Np($c)) if $pos == 1; # next tmp1 for R1 70 sub R1 subroutine 74 &comment("R1 $ki"); 218 &comment("R1 section"); 219 &R1(-1,$A,$B,$C,$D,$X,16, 5,0xf61e2562); 220 &R1( 0,$D,$A,$B,$C,$X,17, 9,0xc040b340); 221 &R1( 0,$C,$D,$A,$B,$X,18,14,0x265e5a51); 222 &R1( [all...] |
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/MBlaze/ |
H A D | MBlazeRegisterInfo.cpp | 74 Reserved.set(MBlaze::R1); 107 New = BuildMI(MF,Old->getDebugLoc(),TII.get(MBlaze::ADDIK),MBlaze::R1) 108 .addReg(MBlaze::R1).addImm(-Amount); 111 New = BuildMI(MF,Old->getDebugLoc(),TII.get(MBlaze::ADDIK),MBlaze::R1) 112 .addReg(MBlaze::R1).addImm(Amount); 182 return TFI->hasFP(MF) ? MBlaze::R19 : MBlaze::R1;
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H A D | MBlazeFrameLowering.cpp | 365 // Adjust stack : addi R1, R1, -imm 366 BuildMI(MBB, MBBI, DL, TII.get(MBlaze::ADDIK), MBlaze::R1) 367 .addReg(MBlaze::R1).addImm(-StackSize); 369 // swi R15, R1, stack_loc 372 .addReg(MBlaze::R15).addReg(MBlaze::R1).addImm(RAOffset); 376 // swi R19, R1, stack_loc 378 .addReg(MBlaze::R19).addReg(MBlaze::R1).addImm(FPOffset); 380 // add R19, R1, R0 382 .addReg(MBlaze::R1) [all...] |
/macosx-10.10.1/llvmCore-3425.0.34/unittests/ADT/ |
H A D | IntrusiveRefCntPtrTest.cpp | 22 IntrusiveRefCntPtr<VirtualRefCounted> R1 = V1; local 32 IntrusiveRefCntPtr<SimpleRefCounted> R1 = S1; local
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/ARM/ |
H A D | ARMCallingConv.h | 31 static const uint16_t RegList[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3 }; 75 static const uint16_t LoRegList[] = { ARM::R1, ARM::R3 }; 76 static const uint16_t ShadowRegList[] = { ARM::R0, ARM::R1 }; 121 static const uint16_t LoRegList[] = { ARM::R1, ARM::R3 };
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/macosx-10.10.1/emacs-93/emacs/lisp/ |
H A D | avoid.el | 206 (R1 (+ (- dist) var )) 209 (if (< R1 (- min cur)) (setq L1 nil R1 nil)) 212 ((and R1 (< delta R1)) delta) 213 ((and R1 (< delta 0)) R1) 217 ((or R1 L2))
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/macosx-10.10.1/xnu-2782.1.97/osfmk/prng/ |
H A D | fips_sha1.c | 135 /* R, R1-R4 are macros used during each transformation round. */ 141 #define R1(v, w, x, y, z, i) R(F, K_00_19, v, w, x, y, z, i) macro 291 R1(e, a, b, c, d, w0); /* 0 */ 292 R1(d, e, a, b, c, w1); /* 1 */ 293 R1(c, d, e, a, b, w2); /* 2 */ 294 R1(b, c, d, e, a, w3); /* 3 */ 295 R1(a, b, c, d, e, w4); /* 4 */ 296 R1(e, a, b, c, d, w5); /* 5 */ 297 R1(d, e, a, b, c, w6); /* 6 */ 298 R1( [all...] |
/macosx-10.10.1/ksh-23/ksh/src/lib/libast/uwin/ |
H A D | crypt.c | 689 register long L0, L1, R0, R1, k; local 711 LOADREG(R,R0,R1,L,L0,L1); 716 R1 = (R1 >> 1) & 0x55555555L; 717 L1 = R0 | R1; /* L1 is the odd-numbered input bits */ 720 PERM3264(R,R0,R1,B.b+4,(C_block *)IE3264); /* odd bits */ 767 CRUNCH(L0, L1, R0, R1); 768 CRUNCH(R0, R1, L0, L1); 774 L0 ^= R0; L1 ^= R1; 775 R0 ^= L0; R1 [all...] |
/macosx-10.10.1/ruby-106/ruby/missing/ |
H A D | crypt.c | 648 register long L0, L1, R0, R1, k; local 670 LOADREG(R,R0,R1,L,L0,L1); 675 R1 = (R1 >> 1) & 0x55555555L; 676 L1 = R0 | R1; /* L1 is the odd-numbered input bits */ 679 PERM3264(R,R0,R1,B.b+4,(C_block *)IE3264); /* odd bits */ 726 CRUNCH(L0, L1, R0, R1); 727 CRUNCH(R0, R1, L0, L1); 733 L0 ^= R0; L1 ^= R1; 734 R0 ^= L0; R1 [all...] |
/macosx-10.10.1/mDNSResponder-561.1.1/mDNSCore/ |
H A D | DNSDigest.c | 893 #define R1(a,b,c,d,k,s,t) { \ macro 962 R1(A,B,C,D,X[ 1], 5,0xf61e2562L); 963 R1(D,A,B,C,X[ 6], 9,0xc040b340L); 964 R1(C,D,A,B,X[11],14,0x265e5a51L); 965 R1(B,C,D,A,X[ 0],20,0xe9b6c7aaL); 966 R1(A,B,C,D,X[ 5], 5,0xd62f105dL); 967 R1(D,A,B,C,X[10], 9,0x02441453L); 968 R1(C,D,A,B,X[15],14,0xd8a1e681L); 969 R1(B,C,D,A,X[ 4],20,0xe7d3fbc8L); 970 R1( [all...] |
/macosx-10.10.1/BerkeleyDB-21/db/mutex/ |
H A D | uts4_cc.s | 19 l r1,64+4(sp) / R1 = new lock value
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/CellSPU/MCTargetDesc/ |
H A D | SPUMCTargetDesc.cpp | 57 // Initial state of the frame pointer is R1. 59 MachineLocation Src(SPU::R1, 0);
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/Sparc/ |
H A D | SparcISelDAGToDAG.cpp | 47 bool SelectADDRrr(SDValue N, SDValue &R1, SDValue &R2); 114 bool SparcDAGToDAGISel::SelectADDRrr(SDValue Addr, SDValue &R1, SDValue &R2) { argument 127 R1 = Addr.getOperand(0); 132 R1 = Addr;
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/macosx-10.10.1/ncurses-44/ncurses/include/ |
H A D | MKkey_defs.sh | 64 key_resize kr1 str R1 KEY_RESIZE + ----- Terminal resize event
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/Mips/MCTargetDesc/ |
H A D | MipsELFObjectWriter.cpp | 207 static bool HasSameSymbol(const RelEntry &R0, const RelEntry &R1) { argument 208 return R0.Sym == R1.Sym; 211 static int CompareOffset(const RelEntry &R0, const RelEntry &R1) { argument 212 return (R0.Offset > R1.Offset) ? 1 : ((R0.Offset == R1.Offset) ? 0 : -1);
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/PowerPC/ |
H A D | PPCFrameLowering.cpp | 348 // offsets of R1 is not allowed. 352 .addReg(PPC::R1); 358 .addReg(PPC::R1); 369 // If there is a preferred stack alignment, align R1 now 378 .addReg(PPC::R1) 385 BuildMI(MBB, MBBI, dl, TII.get(PPC::STWUX), PPC::R1) 386 .addReg(PPC::R1, RegState::Kill) 387 .addReg(PPC::R1) 390 BuildMI(MBB, MBBI, dl, TII.get(PPC::STWU), PPC::R1) 391 .addReg(PPC::R1) [all...] |