Searched refs:FSIN (Results 1 - 23 of 23) sorted by relevance

/macosx-10.10.1/awk-20/src/
H A Dawk.h124 #define FSIN 9 macro
H A Dlex.c79 { "sin", FSIN, BLTIN },
H A Drun.c1495 case FSIN:
/macosx-10.10.1/llvmCore-3425.0.34/include/llvm/CodeGen/
H A DISDOpcodes.h451 /// FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW,
455 FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW, enumerator in enum:llvm::ISD::NodeType
/macosx-10.10.1/vim-55/runtime/syntax/
H A Dtasm.vim53 syn keyword tasmCoprocInstr FSETPM FSIN FSINCOM FSQRT FST FSTP FSTP1 FSTP8
H A Dforth.vim121 syn keyword forthOperators F** FSQRT FEXP FEXPM1 FLN FLNP1 FLOG FALOG FSIN
H A Dmasm.vim235 syn keyword masmOpFloat FSCALE FSETPM FSIN FSINCOS FSQRT FST FSTCW
H A Dnasm.vim357 syn keyword nasmFpuInstruction FSAVE FSCALE FSETPM FSIN FSINCOS FSQRT
/macosx-10.10.1/llvmCore-3425.0.34/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp141 case ISD::FSIN: return "fsin";
H A DLegalizeVectorOps.cpp210 case ISD::FSIN:
H A DLegalizeFloatTypes.cpp89 case ISD::FSIN: R = SoftenFloatRes_FSIN(N); break;
869 case ISD::FSIN: ExpandFloatRes_FSIN(N, Lo, Hi); break;
H A DLegalizeVectorTypes.cpp86 case ISD::FSIN:
522 case ISD::FSIN:
1364 case ISD::FSIN:
H A DSelectionDAGBuilder.cpp4962 setValue(&I, DAG.getNode(ISD::FSIN, dl,
5678 if (visitUnaryFloatCall(I, ISD::FSIN))
H A DLegalizeDAG.cpp3037 case ISD::FSIN:
H A DDAGCombiner.cpp450 case ISD::FSIN:
524 case ISD::FSIN:
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp1102 setOperationAction(ISD::FSIN, MVT::f32, Expand);
1103 setOperationAction(ISD::FSIN, MVT::f64, Expand);
1361 setOperationAction(ISD::FSIN , MVT::f64, Expand);
1364 setOperationAction(ISD::FSIN , MVT::f32, Expand);
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/Sparc/
H A DSparcISelLowering.cpp760 setOperationAction(ISD::FSIN , MVT::f64, Expand);
764 setOperationAction(ISD::FSIN , MVT::f32, Expand);
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/MBlaze/
H A DMBlazeISelLowering.cpp82 setOperationAction(ISD::FSIN, MVT::f32, Expand);
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/CellSPU/
H A DSPUISelLowering.cpp210 setOperationAction(ISD::FSIN , MVT::f64, Expand);
213 setOperationAction(ISD::FSIN , MVT::f32, Expand);
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/Mips/
H A DMipsISelLowering.cpp258 setOperationAction(ISD::FSIN, MVT::f32, Expand);
259 setOperationAction(ISD::FSIN, MVT::f64, Expand);
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/X86/
H A DX86ISelLowering.cpp601 setOperationAction(ISD::FSIN , MVT::f64, Expand);
603 setOperationAction(ISD::FSIN , MVT::f32, Expand);
629 setOperationAction(ISD::FSIN , MVT::f32, Expand);
640 setOperationAction(ISD::FSIN , MVT::f64 , Expand);
655 setOperationAction(ISD::FSIN , MVT::f32 , Expand);
656 setOperationAction(ISD::FSIN , MVT::f64 , Expand);
695 setOperationAction(ISD::FSIN , MVT::f80 , Expand);
742 setOperationAction(ISD::FSIN, (MVT::SimpleValueType)VT, Expand);
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/PowerPC/
H A DPPCISelLowering.cpp133 setOperationAction(ISD::FSIN , MVT::f64, Expand);
138 setOperationAction(ISD::FSIN , MVT::f32, Expand);
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/ARM/
H A DARMISelLowering.cpp491 setOperationAction(ISD::FSIN, MVT::v2f64, Expand);
508 setOperationAction(ISD::FSIN, MVT::v4f32, Expand);
760 setOperationAction(ISD::FSIN, MVT::f64, Expand);
761 setOperationAction(ISD::FSIN, MVT::f32, Expand);

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