Searched refs:AL (Results 1 - 25 of 62) sorted by relevance

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/macosx-10.10.1/ICU-531.30/icuSources/test/cintltst/
H A Dcbididat.c23 "LRE", "LRO", "AL", "RLE", "RLO", "PDF", "NSM", "BN",
31 /* LRE LRO AL RLE RLO PDF NSM BN */
54 R, AL, WS, R, AL, WS, R
84 L, AL, AL, AL, L, AL, AL, L, WS, EN, CS, WS, EN, CS, EN, WS, L, L
99 AL,
[all...]
H A Dcbiditst.h48 #define AL U_RIGHT_TO_LEFT_ARABIC macro
/macosx-10.10.1/JavaScriptCore-7600.1.17/assembler/
H A DARMAssembler.h178 AL = 0xe0000000 // Unconditional / Always execute. enumerator in enum:JSC::ARMAssembler::__anon2498
326 void bitAnd(int rd, int rn, ARMWord op2, Condition cc = AL) argument
331 void bitAnds(int rd, int rn, ARMWord op2, Condition cc = AL) argument
336 void eor(int rd, int rn, ARMWord op2, Condition cc = AL) argument
341 void eors(int rd, int rn, ARMWord op2, Condition cc = AL) argument
346 void sub(int rd, int rn, ARMWord op2, Condition cc = AL) argument
351 void subs(int rd, int rn, ARMWord op2, Condition cc = AL) argument
356 void rsb(int rd, int rn, ARMWord op2, Condition cc = AL) argument
361 void rsbs(int rd, int rn, ARMWord op2, Condition cc = AL) argument
366 void add(int rd, int rn, ARMWord op2, Condition cc = AL) argument
371 adds(int rd, int rn, ARMWord op2, Condition cc = AL) argument
376 adc(int rd, int rn, ARMWord op2, Condition cc = AL) argument
381 adcs(int rd, int rn, ARMWord op2, Condition cc = AL) argument
386 sbc(int rd, int rn, ARMWord op2, Condition cc = AL) argument
391 sbcs(int rd, int rn, ARMWord op2, Condition cc = AL) argument
396 rsc(int rd, int rn, ARMWord op2, Condition cc = AL) argument
401 rscs(int rd, int rn, ARMWord op2, Condition cc = AL) argument
406 tst(int rn, ARMWord op2, Condition cc = AL) argument
411 teq(int rn, ARMWord op2, Condition cc = AL) argument
416 cmp(int rn, ARMWord op2, Condition cc = AL) argument
421 cmn(int rn, ARMWord op2, Condition cc = AL) argument
426 orr(int rd, int rn, ARMWord op2, Condition cc = AL) argument
431 orrs(int rd, int rn, ARMWord op2, Condition cc = AL) argument
436 mov(int rd, ARMWord op2, Condition cc = AL) argument
442 movw(int rd, ARMWord op2, Condition cc = AL) argument
448 movt(int rd, ARMWord op2, Condition cc = AL) argument
455 movs(int rd, ARMWord op2, Condition cc = AL) argument
460 bic(int rd, int rn, ARMWord op2, Condition cc = AL) argument
465 bics(int rd, int rn, ARMWord op2, Condition cc = AL) argument
470 mvn(int rd, ARMWord op2, Condition cc = AL) argument
475 mvns(int rd, ARMWord op2, Condition cc = AL) argument
480 mul(int rd, int rn, int rm, Condition cc = AL) argument
485 muls(int rd, int rn, int rm, Condition cc = AL) argument
490 mull(int rdhi, int rdlo, int rn, int rm, Condition cc = AL) argument
495 vmov_f64(int dd, int dm, Condition cc = AL) argument
500 vadd_f64(int dd, int dn, int dm, Condition cc = AL) argument
505 vdiv_f64(int dd, int dn, int dm, Condition cc = AL) argument
510 vsub_f64(int dd, int dn, int dm, Condition cc = AL) argument
515 vmul_f64(int dd, int dn, int dm, Condition cc = AL) argument
520 vcmp_f64(int dd, int dm, Condition cc = AL) argument
525 vsqrt_f64(int dd, int dm, Condition cc = AL) argument
530 vabs_f64(int dd, int dm, Condition cc = AL) argument
535 vneg_f64(int dd, int dm, Condition cc = AL) argument
540 ldrImmediate(int rd, ARMWord imm, Condition cc = AL) argument
545 ldrUniqueImmediate(int rd, ARMWord imm, Condition cc = AL) argument
550 dtrUp(DataTransferTypeA transferType, int rd, int rb, ARMWord op2, Condition cc = AL) argument
555 dtrUpRegister(DataTransferTypeA transferType, int rd, int rb, int rm, Condition cc = AL) argument
560 dtrDown(DataTransferTypeA transferType, int rd, int rb, ARMWord op2, Condition cc = AL) argument
565 dtrDownRegister(DataTransferTypeA transferType, int rd, int rb, int rm, Condition cc = AL) argument
570 halfDtrUp(DataTransferTypeB transferType, int rd, int rb, ARMWord op2, Condition cc = AL) argument
575 halfDtrUpRegister(DataTransferTypeB transferType, int rd, int rn, int rm, Condition cc = AL) argument
580 halfDtrDown(DataTransferTypeB transferType, int rd, int rb, ARMWord op2, Condition cc = AL) argument
585 halfDtrDownRegister(DataTransferTypeB transferType, int rd, int rn, int rm, Condition cc = AL) argument
590 doubleDtrUp(DataTransferTypeFloat type, int rd, int rb, ARMWord op2, Condition cc = AL) argument
597 doubleDtrDown(DataTransferTypeFloat type, int rd, int rb, ARMWord op2, Condition cc = AL) argument
604 push(int reg, Condition cc = AL) argument
610 pop(int reg, Condition cc = AL) argument
616 poke(int reg, Condition cc = AL) argument
621 peek(int reg, Condition cc = AL) argument
626 vmov_vfp64(int sm, int rt, int rt2, Condition cc = AL) argument
632 vmov_arm64(int rt, int rt2, int sm, Condition cc = AL) argument
638 vmov_vfp32(int sn, int rt, Condition cc = AL) argument
644 vmov_arm32(int rt, int sn, Condition cc = AL) argument
650 vcvt_f64_s32(int dd, int sm, Condition cc = AL) argument
656 vcvt_s32_f64(int sd, int dm, Condition cc = AL) argument
662 vcvt_u32_f64(int sd, int dm, Condition cc = AL) argument
668 vcvt_f64_f32(int dd, int sm, Condition cc = AL) argument
674 vcvt_f32_f64(int dd, int sm, Condition cc = AL) argument
680 vmrs_apsr(Condition cc = AL) argument
685 clz(int rd, int rm, Condition cc = AL) argument
705 bx(int rm, Condition cc = AL) argument
710 blx(int rm, Condition cc = AL) argument
810 loadBranchTarget(int rd, Condition cc = AL, int useConstantPool = 0) argument
818 jmp(Condition cc = AL, int useConstantPool = 0) argument
[all...]
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/ARM/
H A DThumb2RegisterInfo.h36 ARMCC::CondCodes Pred = ARMCC::AL,
H A DThumb2RegisterInfo.cpp50 .addConstantPoolIndex(Idx).addImm((int64_t)ARMCC::AL).addReg(0)
H A DThumb1RegisterInfo.h42 ARMCC::CondCodes Pred = ARMCC::AL,
H A DARMAsmPrinter.cpp1052 BrInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1331 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1352 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1361 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1374 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1386 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1401 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1415 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1450 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1487 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
[all...]
H A DARMInstrInfo.cpp40 NopInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
46 NopInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
H A DThumb2InstrInfo.cpp39 NopInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
63 if (CC != ARMCC::AL)
71 if (CC != ARMCC::AL) {
109 return getITInstrPredicate(MBBI, PredReg) == ARMCC::AL;
404 if (Offset == 0 && getInstrPredicate(&MI, PredReg) == ARMCC::AL) {
570 return ARMCC::AL;
H A DThumb1InstrInfo.cpp33 NopInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
H A DThumb2ITBlockPass.cpp171 if (CC == ARMCC::AL) {
214 if (NCC == ARMCC::AL &&
H A DARMBaseRegisterInfo.h168 ARMCC::CondCodes Pred = ARMCC::AL,
H A DARMBaseInstrInfo.h80 : ARMCC::AL;
321 return MIB.addImm((int64_t)ARMCC::AL).addReg(0);
362 /// condition, otherwise returns AL. It also returns the condition code
H A DThumb2SizeReduction.cpp258 if (Pred == ARMCC::AL) {
510 if (MI->getOperand(3).getImm() != ARMCC::AL)
545 if (getInstrPredicate(MI, PredReg) == ARMCC::AL) {
646 if (Pred != ARMCC::AL) {
738 if (Pred != ARMCC::AL) {
/macosx-10.10.1/screen-22/screen/etc/
H A Detcscreenrc32 # AL add multiple lines
48 termcap facit al=\E[L\E[K:AL@:dl@:DL@:cs=\E[%i%d;%dr:ic@
49 terminfo facit al=\E[L\E[K:AL@:dl@:DL@:cs=\E[%i%p1%d;%p2%dr:ic@
52 termcap sun 'up=^K:AL=\E[%dL:DL=\E[%dM:UP=\E[%dA:DO=\E[%dB:LE=\E[%dD:RI=\E[%dC:IC=\E[%d@:WS=1000\E[8;%d;%dt'
53 terminfo sun 'up=^K:AL=\E[%p1%dL:DL=\E[%p1%dM:UP=\E[%p1%dA:DO=\E[%p1%dB:LE=\E[%p1%dD:RI=\E[%p1%dC:IC=\E[%p1%d@:WS=\E[8;%p1%d;%p2%dt$<1000>'
H A Dscreenrc100 termcap vt100* ms:AL=\E[%dL:DL=\E[%dM:UP=\E[%dA:DO=\E[%dB:LE=\E[%dD:RI=\E[%dC
101 terminfo vt100* ms:AL=\E[%p1%dL:DL=\E[%p1%dM:UP=\E[%p1%dA:DO=\E[%p1%dB:LE=\E[%p1%dD:RI=\E[%p1%dC
/macosx-10.10.1/system_cmds-643.1.1/getty.tproj/
H A Dmain.c381 if (AL) {
382 const char *p = AL;
405 } else if (rval || AL) {
418 if (AL) {
420 "invalid auto-login name: %s", AL);
450 execle(LO, "login", AL ? "-fp1" : "-p1", name,
452 execle(LO, "login", AL ? "-fp" : "-p", name,
H A Dgettytab.h93 #define AL gettystrs[29].value macro
/macosx-10.10.1/ICU-531.30/icuSources/common/
H A Dubidiimp.h50 AL= U_RIGHT_TO_LEFT_ARABIC, /* 13 */ enumerator in enum:__anon767
78 #define MASK_RTL (DIRPROP_FLAG(R)|DIRPROP_FLAG(AL)|DIRPROP_FLAG(RLE)|DIRPROP_FLAG(RLO)|DIRPROP_FLAG(RLI))
79 #define MASK_R_AL (DIRPROP_FLAG(R)|DIRPROP_FLAG(AL))
80 #define MASK_STRONG_EN_AN (DIRPROP_FLAG(L)|DIRPROP_FLAG(R)|DIRPROP_FLAG(AL)|DIRPROP_FLAG(EN)|DIRPROP_FLAG(AN))
156 uint16_t flags; /* bits for L or R/AL found within the pair */
335 /* lastArabicPos is index to the last AL in the text, -1 if none */
H A Dubidi.c387 if(dirProp==L || dirProp==R || dirProp==AL) {
425 * default. Only if a strong R or AL is found within its scope will the LRI be
439 strong R or AL character at either end of the text */
523 if(dirProp==R || dirProp==AL) {
536 if(dirProp==AL)
623 a strong R or AL at either end of the paragraph */
946 else if(dirProp<=R || dirProp==AL) {
964 if(pLastIsoRun->lastStrong==AL)
990 if(newProp<=R || newProp==AL) {
1413 /* L R EN ES ET AN CS B S WS ON LRE LRO AL RL
[all...]
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/ARM/MCTargetDesc/
H A DARMBaseInfo.h44 AL // Always (unconditional) Always (unconditional) enumerator in enum:llvm::ARMCC::CondCodes
84 case ARMCC::AL: return "al";
H A DARMMCTargetDesc.cpp211 if (Inst.getOpcode() == ARM::Bcc && Inst.getOperand(1).getImm()==ARMCC::AL)
218 if (Inst.getOpcode() == ARM::Bcc && Inst.getOperand(1).getImm()==ARMCC::AL)
/macosx-10.10.1/vim-55/runtime/
H A Dtermcap17 :AL=\E[%dL:DL=\E[%dM:IC=\E[%d@:DC=\E[%dP:\
65 :al=\E[L:AL=\E[%dL:dl=\E[M:DL=\E[%dM:le=^H:cm=\E[%i%d;%dH:\
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/X86/
H A DX86SelectionDAGInfo.cpp112 ValReg = X86::AL;
129 Chain = DAG.getCopyToReg(Chain, dl, X86::AL, Src, InFlag);
H A DX86RegisterInfo.cpp622 case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX:
634 case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX:
635 return X86::AL;
671 case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX:
707 case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX:
759 case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX:

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