Searched refs:i8 (Results 1 - 25 of 60) sorted by relevance

123

/macosx-10.10/tcl-105/tcl_ext/ffidl/ffidl/tests/
H A Dqsort.test45 foreach {i1 i2 i3 i4 i5 i6 i7 i8} $ints {
46 append msg "$i1 $i2 $i3 $i4 $i5 $i6 $i7 $i8" "\n"
H A Dcallbacks.test89 foreach {i1 i2 i3 i4 i5 i6 i7 i8} $ints {
90 append msg "$i1 $i2 $i3 $i4 $i5 $i6 $i7 $i8" "\n"
/macosx-10.10/llvmCore-3425.0.34/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp67 addRegisterClass(MVT::i8, &MSP430::GR8RegClass);
83 setIndexedLoadAction(ISD::POST_INC, MVT::i8, Legal);
89 setLoadExtAction(ISD::SEXTLOAD, MVT::i8, Expand);
93 setTruncStoreAction(MVT::i16, MVT::i8, Expand);
95 setOperationAction(ISD::SRA, MVT::i8, Custom);
96 setOperationAction(ISD::SHL, MVT::i8, Custom);
97 setOperationAction(ISD::SRL, MVT::i8, Custom);
101 setOperationAction(ISD::ROTL, MVT::i8, Expand);
102 setOperationAction(ISD::ROTR, MVT::i8, Expand);
109 setOperationAction(ISD::BR_CC, MVT::i8, Custo
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H A DMSP430ISelLowering.h76 virtual MVT getShiftAmountTy(EVT LHSTy) const { return MVT::i8; }
104 /// register R15W to i8 by referencing its sub-register R15B.
/macosx-10.10/Security-57031.1.35/Security/include/security_cryptkit/
H A DgiantFFT.c269 register int is, iD, i0, i1, i2, i3, i4, i5, i6, i7, i8, local
346 i8 = i7 + n4;
349 t3 = x[i4]*cc3 + x[i8]*ss3;
350 t4 = x[i8]*cc3 - x[i4]*ss3;
357 x[i8] = t2;
380 register int is, iD, i0, i1, i2, i3, i4, i5, i6, i7, i8, local
445 i8 = i7+n4;
450 t3 = x[i8] + x[i3];
451 x[i6] = x[i8] - x[i3];
461 x[i8]
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/macosx-10.10/Security-57031.1.35/Security/libsecurity_cryptkit/lib/
H A DgiantFFT.c269 register int is, iD, i0, i1, i2, i3, i4, i5, i6, i7, i8, local
346 i8 = i7 + n4;
349 t3 = x[i4]*cc3 + x[i8]*ss3;
350 t4 = x[i8]*cc3 - x[i4]*ss3;
357 x[i8] = t2;
380 register int is, iD, i0, i1, i2, i3, i4, i5, i6, i7, i8, local
445 i8 = i7+n4;
450 t3 = x[i8] + x[i3];
451 x[i6] = x[i8] - x[i3];
461 x[i8]
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/macosx-10.10/llvmCore-3425.0.34/lib/Target/CellSPU/
H A DSPUISelLowering.cpp42 if (VT==MVT::i8) retval=3;
105 addRegisterClass(MVT::i8, &SPU::R8CRegClass);
113 // SPU has no sign or zero extended loads for i1, i8, i16:
124 setTruncStoreAction(MVT::i128, MVT::i8, Expand);
133 for (unsigned sctype = (unsigned) MVT::i8; sctype < (unsigned) MVT::i128;
143 for (unsigned stype = sctype - 1; stype >= (unsigned) MVT::i8; --stype) {
168 setOperationAction(ISD::SELECT_CC, MVT::i8, Custom);
178 setOperationAction(ISD::SREM, MVT::i8, Expand);
179 setOperationAction(ISD::UREM, MVT::i8, Expand);
180 setOperationAction(ISD::SDIV, MVT::i8, Expan
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/macosx-10.10/ICU-531.30/icuSources/test/cintltst/
H A Dtrie2test.c379 int32_t prev8, i8; local
391 prev8=i8=0;
406 if(i8<sizeof(illegal)) {
407 U8_FWD_1(illegal, i8, sizeof(illegal));
408 while(prev8<i8) {
415 while(i8<sizeof(illegal)) {
416 U8_FWD_1(illegal, i8, sizeof(illegal));
417 while(prev8<i8) {
428 prev8=i8=(int32_t)(p-s);
429 U8_NEXT(s, i8, lengt
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/macosx-10.10/llvmCore-3425.0.34/lib/Target/X86/
H A DX86SelectionDAGInfo.cpp111 AVT = MVT::i8;
117 if (AVT.bitsGT(MVT::i8)) {
127 AVT = MVT::i8;
157 SDValue Ops[] = { Chain, DAG.getValueType(MVT::i8), InFlag };
207 AVT = MVT::i8;
H A DX86ISelDAGToDAG.cpp267 /// i8.
269 return CurDAG->getTargetConstant(Imm, MVT::i8);
781 SDValue Eight = DAG.getConstant(8, MVT::i8);
785 SDValue ShlCount = DAG.getConstant(ScaleLog, MVT::i8);
935 SDValue NewSRLAmt = DAG.getConstant(ShiftAmt + AMShiftAmt, MVT::i8);
937 SDValue NewSHLAmt = DAG.getConstant(AMShiftAmt, MVT::i8);
1724 case MVT::i8:
1871 LdVT != MVT::i8)
1935 if (LdVT == MVT::i8) return X86::DEC8m;
1941 if (LdVT == MVT::i8) retur
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H A DX86ISelLowering.cpp167 static const MVT IntVTs[] = { MVT::i8, MVT::i16, MVT::i32, MVT::i64 };
169 // X86 is weird, it always uses i8 for shift amounts and setcc results.
185 // Bypass i32 with i8 on Atom when compiling with O2
224 addRegisterClass(MVT::i8, &X86::GR8RegClass);
235 setTruncStoreAction(MVT::i64, MVT::i8 , Expand);
237 setTruncStoreAction(MVT::i32, MVT::i8 , Expand);
238 setTruncStoreAction(MVT::i16, MVT::i8, Expand);
251 setOperationAction(ISD::UINT_TO_FP , MVT::i8 , Promote);
266 // Promote i1/i8 SINT_TO_FP to larger SINT_TO_FP's, as X86 doesn't have
269 setOperationAction(ISD::SINT_TO_FP , MVT::i8 , Promot
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H A DX86FastISel.cpp186 case MVT::i8:
250 // FALLTHROUGH, handling i1 as i8.
251 case MVT::i8: Opc = X86::MOV8mr; break;
294 case MVT::i1: Signed = false; // FALLTHROUGH to handle as i8.
295 case MVT::i8: Opc = X86::MOV8mi; break;
780 if (SrcVT != MVT::i1 && SrcVT != MVT::i8 && SrcVT != MVT::i16)
791 SrcReg = FastEmitZExtFromI1(MVT::i8, SrcReg, /*TODO: Kill=*/false);
792 SrcVT = MVT::i8;
861 case MVT::i8: return X86::CMP8rr;
879 case MVT::i8
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/macosx-10.10/dtrace-147/test/tst/common/typedef/
H A Dtst.TypedefDataAssign.d84 new_int8 i8;
/macosx-10.10/JavaScriptCore-7600.1.17/llint/
H A DLowLevelInterpreter.cpp171 int8_t i8; member in struct:JSC::CLoopRegister::__anon2627::__anon2630
187 int8_t i8; member in struct:JSC::CLoopRegister::__anon2627::__anon2634
202 int8_t i8; member in struct:JSC::CLoopRegister::__anon2627::__anon2636
211 int8_t i8; member in struct:JSC::CLoopRegister::__anon2627::__anon2638
/macosx-10.10/ICU-531.30/icuSources/test/iotest/
H A Diotest.cpp211 int8_t i8; local
263 i8 = (int8_t)uto64(argument);
264 uBufferLenReturned = u_sprintf_u(uBuffer, format, i8);
265 uFileBufferLenReturned = u_fprintf_u(testFile.getAlias(), format, i8);
376 int8_t i8, expected8; local
442 uBufferLenReturned = u_sscanf_u(argument, format, &i8);
443 //uFileBufferLenReturned = u_fscanf_u(testFile, format, i8);
444 if (i8 != expected8) {
446 i, i8, expected8);
580 int8_t i8; local
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/macosx-10.10/llvmCore-3425.0.34/lib/Target/NVPTX/
H A DNVPTXISelDAGToDAG.cpp211 case MVT::i8: Opcode = NVPTX::LD_i8_avar; break;
241 case MVT::i8: Opcode = NVPTX::LD_i8_asi; break;
271 case MVT::i8: Opcode = NVPTX::LD_i8_ari; break;
300 case MVT::i8: Opcode = NVPTX::LD_i8_areg; break;
397 case MVT::i8: Opcode = NVPTX::ST_i8_avar; break;
428 case MVT::i8: Opcode = NVPTX::ST_i8_asi; break;
459 case MVT::i8: Opcode = NVPTX::ST_i8_ari; break;
488 case MVT::i8: Opcode = NVPTX::ST_i8_areg; break;
676 Retval = CurDAG->getTargetConstant(0, MVT::i8);
680 Retval = CurDAG->getTargetConstant(retval, MVT::i8);
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/macosx-10.10/tcl-105/tcl_ext/snack/snack/generic/
H A Dffa.c123 int i1, i2, i3, i4, i5, i6, i7, i8, i9, i10, i11, i12, i13, i14; local
176 for (i8 = i7; i8 < l[7]; i8 += l[8]) {
177 for (i9 = i8; i9 < l[6]; i9 += l[7]) {
413 int i1, i2, i3, i4, i5, i6, i7, i8, i9, i10, i11, i12, i13, i14; local
466 for (i8 = i7; i8 < l[7]; i8 += l[8]) {
467 for (i9 = i8; i
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/macosx-10.10/llvmCore-3425.0.34/include/llvm/CodeGen/
H A DValueTypes.h40 i8 = 2, // This is an 8 bit integer value enumerator in enum:llvm::MVT::SimpleValueType
63 v2i8 = 17, // 2 x i8
64 v4i8 = 18, // 4 x i8
65 v8i8 = 19, // 8 x i8
66 v16i8 = 20, // 16 x i8
67 v32i8 = 21, // 32 x i8
262 case v32i8: return i8;
337 case i8 :
416 return MVT::i8;
438 case MVT::i8
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/macosx-10.10/llvmCore-3425.0.34/lib/Target/ARM/
H A DARMSelectionDAGInfo.cpp101 VT = MVT::i8;
124 VT = MVT::i8;
H A DARMFastISel.cpp558 if (VT != MVT::i32 && VT != MVT::i16 && VT != MVT::i8 && VT != MVT::i1)
776 if (VT == MVT::i1 || VT == MVT::i8 || VT == MVT::i16)
903 case MVT::i8:
1011 case MVT::i8:
1141 case MVT::i8:
1417 if (SrcVT == MVT::i32 || SrcVT == MVT::i16 || SrcVT == MVT::i8 ||
1452 case MVT::i8:
1480 // We have i1, i8, or i16, we need to either zero extend or sign extend.
1593 if (SrcVT != MVT::i32 && SrcVT != MVT::i16 && SrcVT != MVT::i8)
1600 if (SrcVT == MVT::i16 || SrcVT == MVT::i8) {
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/macosx-10.10/ksh-23/ksh/src/cmd/ksh93/tests/
H A Dattributes.sh34 r=readonly u=Uppercase l=Lowercase i=22 i8=10 L=abc L5=def uL5=abcdef xi=20
36 for option in u l i i8 L L5 LZ5 RZ5 Z5 r x H t R5 uL5 lR5 xi n
44 if [[ $i8 != 8#12 ]]
/macosx-10.10/llvmCore-3425.0.34/lib/Target/Hexagon/
H A DHexagonVarargsCallingConvention.h50 LocVT == MVT::i8 ||
/macosx-10.10/llvmCore-3425.0.34/include/llvm/Support/
H A DDataTypes.h.cmake137 # define INT8_C(C) C##i8
H A DDataTypes.h.in134 # define INT8_C(C) C##i8
/macosx-10.10/llvmCore-3425.0.34/lib/VMCore/
H A DValueTypes.cpp116 case MVT::i8: return "i8";
176 case MVT::i8: return Type::getInt8Ty(Context);

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