/macosx-10.10/llvmCore-3425.0.34/lib/Target/ |
H A D | TargetInstrInfo.cpp | 34 TargetInstrInfo::getRegClass(const MCInstrDesc &MCID, unsigned OpNum, function in class:TargetInstrInfo 49 return TRI->getRegClass(RegClass);
|
H A D | TargetRegisterInfo.cpp | 85 const TargetRegisterClass *SubRC = getRegClass(Idx + Offset); 154 return TRI->getRegClass(I + CountTrailingZeros_32(Common));
|
/macosx-10.10/llvmCore-3425.0.34/lib/CodeGen/ |
H A D | RegAllocBase.cpp | 101 << MRI->getRegClass(VirtReg->reg)->getName() 122 RegClassInfo.getOrder(MRI->getRegClass(VirtReg->reg)).front());
|
H A D | AllocationOrder.cpp | 29 const TargetRegisterClass *RC = VRM.getRegInfo().getRegClass(VirtReg);
|
H A D | PeepholeOptimizer.cpp | 158 const TargetRegisterClass *DstRC = MRI->getRegClass(DstReg); 169 getSubClassWithSubReg(MRI->getRegClass(SrcReg), SubIdx) != 0; 263 const TargetRegisterClass *RC = MRI->getRegClass(SrcReg); 357 if (MRI->getRegClass(SrcSrc) != MRI->getRegClass(Def))
|
H A D | VirtRegMap.cpp | 95 const TargetRegisterClass* RC = MF->getRegInfo().getRegClass(virtReg); 116 << MRI->getRegClass(Reg)->getName() << "\n"; 124 << "] " << MRI->getRegClass(Reg)->getName() << "\n";
|
H A D | OptimizePHIs.cpp | 168 if (!MRI->constrainRegClass(SingleValReg, MRI->getRegClass(OldReg)))
|
H A D | Spiller.cpp | 88 const TargetRegisterClass *trc = mri->getRegClass(li->reg);
|
H A D | LiveRangeEdit.cpp | 35 unsigned VReg = MRI.createVirtualRegister(MRI.getRegClass(OldReg)); 384 << MRI.getRegClass(LI.reg)->getName() << '\n');
|
H A D | MachineRegisterInfo.cpp | 53 const TargetRegisterClass *OldRC = getRegClass(Reg); 68 const TargetRegisterClass *OldRC = getRegClass(Reg);
|
H A D | MachineSink.cpp | 136 const TargetRegisterClass *SRC = MRI->getRegClass(SrcReg); 137 const TargetRegisterClass *DRC = MRI->getRegClass(DstReg); 508 if (!TII->isSafeToMoveRegClassDefs(MRI->getRegClass(Reg)))
|
H A D | CalcSpillWeights.cpp | 79 const TargetRegisterClass *rc = mri.getRegClass(reg);
|
H A D | RegisterPressure.cpp | 105 MRI->getRegClass(Regs[I]), TRI); 111 decreaseSetPressure(CurrSetPressure, MRI->getRegClass(Regs[I]), TRI); 406 P.increase(MRI->getRegClass(Reg), TRI); 418 P.increase(MRI->getRegClass(Reg), TRI);
|
H A D | TailDuplication.cpp | 285 MRI->constrainRegClass(Src, MRI->getRegClass(Dst))) { 396 const TargetRegisterClass *RC = MRI->getRegClass(DefReg); 433 const TargetRegisterClass *RC = MRI->getRegClass(Reg); 443 MRI->constrainRegClass(VI->second, MRI->getRegClass(Reg));
|
H A D | UnreachableBlockElim.cpp | 201 MRI.constrainRegClass(Input, MRI.getRegClass(Output));
|
H A D | TwoAddressInstructionPass.cpp | 1118 TII->getRegClass(UnfoldMCID, LoadRegIndex, TRI, *MF)); 1226 if (const TargetRegisterClass *RC = TII->getRegClass(MCID, SrcIdx, 1310 MRI->constrainRegClass(RegA, MRI->getRegClass(RegB)); 1564 if (!TRI->canCombineSubRegIndices(MRI->getRegClass(SrcReg), SrcSubIndices, 1571 if (!TRI->canCombineSubRegIndices(MRI->getRegClass(DstReg), DstSubIndices, 1706 !TRI->getMatchingSuperRegClass(MRI->getRegClass(DstReg), 1707 MRI->getRegClass(SrcReg), SubIdx)) {
|
H A D | InlineSpiller.cpp | 726 MRI.getRegClass(SVI.SpillReg), &TRI); 1081 MRI.getRegClass(NewLI.reg), &TRI); 1099 MRI.getRegClass(NewLI.reg), &TRI); 1228 StackInt = &LSS.getOrCreateInterval(StackSlot, MRI.getRegClass(Original)); 1279 << MRI.getRegClass(edit.getReg())->getName()
|
H A D | CriticalAntiDepBreaker.cpp | 193 NewRC = TII->getRegClass(MI->getDesc(), i, TRI, MF); 288 NewRC = TII->getRegClass(MI->getDesc(), i, TRI, MF);
|
H A D | MachineCSE.cpp | 139 if (!MRI->constrainRegClass(SrcReg, MRI->getRegClass(Reg))) 521 const TargetRegisterClass *OldRC = MRI->getRegClass(OldReg);
|
H A D | RegAllocPBQP.cpp | 215 const TargetRegisterClass *trc = mri->getRegClass(vreg); 531 const TargetRegisterClass *liRC = mri->getRegClass(li->reg);
|
H A D | RegisterCoalescer.cpp | 263 Dst = TRI.getMatchingSuperReg(Dst, SrcSub, MRI.getRegClass(Src)); 266 } else if (!MRI.getRegClass(Src)->contains(Dst)) { 271 const TargetRegisterClass *SrcRC = MRI.getRegClass(Src); 272 const TargetRegisterClass *DstRC = MRI.getRegClass(Dst); 631 !MRI->constrainRegClass(IntB.reg, MRI->getRegClass(IntA.reg))) 741 const TargetRegisterClass *RC = TII->getRegClass(MCID, 0, TRI, *MF); 743 if (MRI->getRegClass(DstReg) != RC) 2398 << MRI->getRegClass(Reg)->getName() << '\n');
|
/macosx-10.10/llvmCore-3425.0.34/lib/CodeGen/SelectionDAG/ |
H A D | InstrEmitter.cpp | 136 TII->getRegClass(II, i+II.getNumDefs(), TRI, *MF)); 161 DstRC = MRI->getRegClass(VRBase); 219 TRI->getAllocatableClass(TII->getRegClass(II, i, TRI, *MF)); 237 const TargetRegisterClass *RegRC = MRI->getRegClass(Reg); 316 DstRC = TRI->getAllocatableClass(TII->getRegClass(*II,IIOpNum,TRI,*MF)); 430 const TargetRegisterClass *VRC = MRI->getRegClass(VReg); 488 TRC == MRI->getRegClass(SrcReg)) { 539 if (VRBase == 0 || !SRC->hasSubClassEq(MRI->getRegClass(VRBase))) 580 TRI->getAllocatableClass(TRI->getRegClass(DstRCIdx)); 597 const TargetRegisterClass *RC = TRI->getRegClass(DstRCId [all...] |
/macosx-10.10/llvmCore-3425.0.34/utils/TableGen/ |
H A D | CodeGenTarget.h | 125 return *getRegBank().getRegClass(R);
|
/macosx-10.10/llvmCore-3425.0.34/include/llvm/MC/ |
H A D | MCRegisterInfo.h | 371 /// getRegClass - Returns the register class associated with the enumeration 373 const MCRegisterClass getRegClass(unsigned i) const {
|
/macosx-10.10/llvmCore-3425.0.34/lib/Target/Hexagon/ |
H A D | HexagonPeephole.cpp | 226 const TargetRegisterClass *RC0 = MRI->getRegClass(Reg0);
|