Searched refs:NewOpcode (Results 1 - 7 of 7) sorted by relevance

/macosx-10.10/llvmCore-3425.0.34/lib/Target/Hexagon/
H A DHexagonCFGOptimizer.cpp68 int NewOpcode = 0; local
71 NewOpcode = Hexagon::JMP_cNot;
75 NewOpcode = Hexagon::JMP_c;
79 NewOpcode = Hexagon::JMP_cdnNotPt;
83 NewOpcode = Hexagon::JMP_cdnPt;
90 MI->setDesc(QII->get(NewOpcode));
H A DHexagonVLIWPacketizer.cpp1445 int NewOpcode; local
1447 NewOpcode = GetDotNewPredOp(MI->getOpcode());
1449 NewOpcode = GetDotNewOp(MI->getOpcode());
1450 MI->setDesc(QII->get(NewOpcode));
2159 int NewOpcode = GetDotOldOp(MI->getOpcode()); local
2160 MI->setDesc(QII->get(NewOpcode));
3013 int NewOpcode = GetDotNewOp(MI->getOpcode()); local
3014 const MCInstrDesc &desc = QII->get(NewOpcode);
/macosx-10.10/llvmCore-3425.0.34/lib/Target/XCore/
H A DXCoreRegisterInfo.cpp276 int NewOpcode; local
278 NewOpcode = (isU6) ? XCore::LDWSP_ru6 : XCore::LDWSP_lru6;
279 BuildMI(MBB, II, dl, TII.get(NewOpcode), Reg)
283 NewOpcode = (isU6) ? XCore::STWSP_ru6 : XCore::STWSP_lru6;
284 BuildMI(MBB, II, dl, TII.get(NewOpcode))
289 NewOpcode = (isU6) ? XCore::LDAWSP_ru6 : XCore::LDAWSP_lru6;
290 BuildMI(MBB, II, dl, TII.get(NewOpcode), Reg)
/macosx-10.10/llvmCore-3425.0.34/lib/Target/X86/
H A DX86InstrInfo.cpp3184 unsigned NewOpcode = 0; local
3207 case X86::SUB64rm: NewOpcode = X86::CMP64rm; break;
3208 case X86::SUB32rm: NewOpcode = X86::CMP32rm; break;
3209 case X86::SUB16rm: NewOpcode = X86::CMP16rm; break;
3210 case X86::SUB8rm: NewOpcode = X86::CMP8rm; break;
3211 case X86::SUB64rr: NewOpcode = X86::CMP64rr; break;
3212 case X86::SUB32rr: NewOpcode = X86::CMP32rr; break;
3213 case X86::SUB16rr: NewOpcode = X86::CMP16rr; break;
3214 case X86::SUB8rr: NewOpcode = X86::CMP8rr; break;
3215 case X86::SUB64ri32: NewOpcode
[all...]
/macosx-10.10/llvmCore-3425.0.34/lib/Target/ARM/
H A DARMExpandPseudoInsts.cpp1219 unsigned NewOpcode, DLane, DSubReg; local
1224 NewOpcode = ARM::VSETLNi8;
1230 NewOpcode = ARM::VSETLNi16;
1237 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(NewOpcode));
/macosx-10.10/llvmCore-3425.0.34/lib/Target/PowerPC/
H A DPPCRegisterInfo.cpp643 unsigned NewOpcode = ImmToIdxMap.find(OpC)->second; local
644 MI.setDesc(TII.get(NewOpcode));
/macosx-10.10/llvmCore-3425.0.34/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp3394 unsigned NewOpcode = N0.getOpcode() == ISD::AND ? ISD::OR : ISD::AND; local
3398 return DAG.getNode(NewOpcode, N->getDebugLoc(), VT, LHS, RHS);
3406 unsigned NewOpcode = N0.getOpcode() == ISD::AND ? ISD::OR : ISD::AND; local
3410 return DAG.getNode(NewOpcode, N->getDebugLoc(), VT, LHS, RHS);

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