Searched refs:FABS (Results 1 - 19 of 19) sorted by relevance

/macosx-10.10/llvmCore-3425.0.34/include/llvm/CodeGen/
H A DISDOpcodes.h451 /// FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW,
455 FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW, enumerator in enum:llvm::ISD::NodeType
/macosx-10.10/vim-55/runtime/syntax/
H A Dtasm.vim45 syn keyword tasmCoprocInstr FABS FADD FADDP FBLD FBSTP FCHG FCOM FCOM2 FCOMI
H A Dforth.vim120 syn keyword forthOperators F+ F- F* F/ FNEGATE FABS FMAX FMIN FLOOR FROUND
H A Dmasm.vim227 syn keyword masmOpFloat F2XM1 FABS FADD FADDP FBLD FBSTP FCHS FCLEX
H A Dnasm.vim347 syn keyword nasmFpuInstruction F2XM1 FABS FADD[P] FBLD FBSTP
/macosx-10.10/llvmCore-3425.0.34/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp138 case ISD::FABS: return "fabs";
H A DLegalizeFloatTypes.cpp66 case ISD::FABS: R = SoftenFloatRes_FABS(N); break;
849 case ISD::FABS: ExpandFloatRes_FABS(N, Lo, Hi); break;
902 Hi = DAG.getNode(ISD::FABS, dl, Tmp.getValueType(), Tmp);
H A DLegalizeVectorOps.cpp208 case ISD::FABS:
H A DDAGCombiner.cpp1151 case ISD::FABS: return visitFABS(N);
5439 (N0.getOpcode() == ISD::FABS && !TLI.isFAbsFree(VT))) &&
5450 assert(N0.getOpcode() == ISD::FABS);
6148 if (!LegalOperations || TLI.isOperationLegal(ISD::FABS, VT))
6149 return DAG.getNode(ISD::FABS, N->getDebugLoc(), VT, N0);
6153 DAG.getNode(ISD::FABS, N0.getDebugLoc(), VT, N0));
6160 if (N0.getOpcode() == ISD::FABS || N0.getOpcode() == ISD::FNEG ||
6166 if (N1.getOpcode() == ISD::FABS)
6167 return DAG.getNode(ISD::FABS, N->getDebugLoc(), VT, N0);
6498 return DAG.getNode(ISD::FABS,
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H A DLegalizeVectorTypes.cpp71 case ISD::FABS:
506 case ISD::FABS:
1352 case ISD::FABS:
H A DSelectionDAG.cpp2485 case ISD::FABS:
2673 case ISD::FABS:
2675 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
H A DLegalizeDAG.cpp1545 SDValue AbsVal = DAG.getNode(ISD::FABS, dl, Tmp1.getValueType(), Tmp1);
3021 case ISD::FABS: {
3022 // Expand Y = FABS(X) -> Y = (X >u 0.0) ? X : fneg(X).
H A DSelectionDAGBuilder.cpp4990 setValue(&I, DAG.getNode(ISD::FABS, dl,
5672 if (visitUnaryFloatCall(I, ISD::FABS))
/macosx-10.10/llvmCore-3425.0.34/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp1158 setOperationAction(ISD::FABS, MVT::f32, Legal);
1159 setOperationAction(ISD::FABS, MVT::f64, Expand);
1270 setOperationAction(ISD::FABS, MVT::f32, Expand);
1271 setOperationAction(ISD::FABS, MVT::f64, Expand);
/macosx-10.10/llvmCore-3425.0.34/lib/Target/Mips/
H A DMipsISelLowering.cpp200 setOperationAction(ISD::FABS, MVT::f32, Custom);
201 setOperationAction(ISD::FABS, MVT::f64, Custom);
861 case ISD::FABS: return LowerFABS(Op, DAG);
/macosx-10.10/llvmCore-3425.0.34/lib/Target/CellSPU/
H A DSPUISelDAGToDAG.cpp819 } else if (Opc == ISD::FABS) {
/macosx-10.10/llvmCore-3425.0.34/lib/Target/X86/
H A DX86ISelLowering.cpp584 // Use ANDPD to simulate FABS.
585 setOperationAction(ISD::FABS , MVT::f64, Custom);
586 setOperationAction(ISD::FABS , MVT::f32, Custom);
616 // Use ANDPS to simulate FABS.
617 setOperationAction(ISD::FABS , MVT::f32, Custom);
741 setOperationAction(ISD::FABS, (MVT::SimpleValueType)VT, Expand);
839 setOperationAction(ISD::FABS, MVT::v4f32, Custom);
873 setOperationAction(ISD::FABS, MVT::v2f64, Custom);
1040 setOperationAction(ISD::FABS, MVT::v8f32, Custom);
1049 setOperationAction(ISD::FABS, MV
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/macosx-10.10/llvmCore-3425.0.34/lib/Target/ARM/
H A DARMISelLowering.cpp487 // FIXME: Create unittest for FNEG and for FABS.
489 setOperationAction(ISD::FABS, MVT::v2f64, Expand);
/macosx-10.10/Heimdal-398.1.2/lib/sqlite/
H A Dsqlite3.c128818 #define FABS macro
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