Searched refs:regMP1_SMN_IH_SW_INT_CTRL_BASE_IDX (Results 1 - 8 of 8) sorted by relevance

/linux-master/drivers/gpu/drm/amd/include/asic_reg/mp/
H A Dmp_14_0_0_offset.h290 #define regMP1_SMN_IH_SW_INT_CTRL_BASE_IDX 0 macro
H A Dmp_13_0_5_offset.h382 #define regMP1_SMN_IH_SW_INT_CTRL_BASE_IDX 0 macro
H A Dmp_13_0_8_offset.h383 #define regMP1_SMN_IH_SW_INT_CTRL_BASE_IDX 0 macro
H A Dmp_13_0_2_offset.h388 #define regMP1_SMN_IH_SW_INT_CTRL_BASE_IDX 0 macro
H A Dmp_13_0_0_offset.h380 #define regMP1_SMN_IH_SW_INT_CTRL_BASE_IDX 0 macro
H A Dmp_13_0_4_offset.h381 #define regMP1_SMN_IH_SW_INT_CTRL_BASE_IDX 1 macro
H A Dmp_13_0_6_offset.h381 #define regMP1_SMN_IH_SW_INT_CTRL_BASE_IDX 0 macro
H A Dmp_14_0_2_offset.h290 #define regMP1_SMN_IH_SW_INT_CTRL_BASE_IDX 1 macro

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