Searched refs:rFPGA0_AnalogParameter1 (Results 1 - 4 of 4) sorted by relevance
/linux-master/drivers/staging/rtl8192e/rtl8192e/ |
H A D | r8192E_phy.c | 413 rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter1, bXtalCap92x, 852 rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter1, 0x00100000, 1); 872 rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter1, 0x00100000, 0); 969 rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter1, 0x18, 0x0); 972 rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter1, 0x60, 0x0); 973 rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter1, 0x4, 0x0); 1014 rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter1, 1021 rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter1, 1027 rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter1,
|
H A D | r8192E_phyreg.h | 59 #define rFPGA0_AnalogParameter1 0x880 macro
|
/linux-master/drivers/staging/rtl8723bs/include/ |
H A D | Hal8192CPhyReg.h | 133 #define rFPGA0_AnalogParameter1 0x880 /* Crystal cap setting RF-R/W protection for parameter4?? */ macro 614 #define bADClkPhase 0x4000000 /* Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ */
|
/linux-master/drivers/staging/rtl8712/ |
H A D | rtl871x_mp_phy_regdef.h | 121 #define rFPGA0_AnalogParameter1 0x880 /* Crystal cap setting macro 522 /* Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ */
|
Completed in 209 milliseconds