Searched refs:mmTPC2_RTR_SPLIT_COEF_0 (Results 1 - 2 of 2) sorted by relevance

/linux-master/drivers/accel/habanalabs/include/goya/asic_reg/
H A Dtpc2_rtr_regs.h142 #define mmTPC2_RTR_SPLIT_COEF_0 0xE80400 macro
/linux-master/drivers/accel/habanalabs/goya/
H A Dgoya.c1772 WREG32(mmTPC2_RTR_SPLIT_COEF_0 + offset, polynom[i] >> 7);

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