Searched refs:mmTPC0_QM_GLBL_CFG0 (Results 1 - 6 of 6) sorted by relevance

/linux-master/drivers/accel/habanalabs/include/goya/asic_reg/
H A Dtpc0_qm_regs.h22 #define mmTPC0_QM_GLBL_CFG0 0xE08000 macro
/linux-master/drivers/accel/habanalabs/include/gaudi/asic_reg/
H A Dtpc0_qm_regs.h22 #define mmTPC0_QM_GLBL_CFG0 0xE08000 macro
/linux-master/drivers/accel/habanalabs/goya/
H A Dgoya_security.c729 pb_addr = (mmTPC0_QM_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS;
730 word_offset = ((mmTPC0_QM_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2;
731 mask = 1 << ((mmTPC0_QM_GLBL_CFG0 & 0x7F) >> 2);
H A Dgoya.c1981 WREG32(mmTPC0_QM_GLBL_CFG0 + reg_off, QMAN_TPC_ENABLE);
2077 WREG32(mmTPC0_QM_GLBL_CFG0, 0);
/linux-master/drivers/accel/habanalabs/gaudi/
H A Dgaudi.c406 [SP_TPC0_CMDQ] = mmTPC0_QM_GLBL_CFG0,
408 [SP_NEXT_TPC] = mmTPC1_QM_GLBL_CFG0 - mmTPC0_QM_GLBL_CFG0,
3025 (mmTPC1_QM_GLBL_CFG0 - mmTPC0_QM_GLBL_CFG0);
3131 WREG32(mmTPC0_QM_GLBL_CFG0 + tpc_offset,
3139 tpc_offset += mmTPC1_QM_GLBL_CFG0 - mmTPC0_QM_GLBL_CFG0;
3333 WREG32(mmTPC0_QM_GLBL_CFG0 + tpc_offset, 0);
3334 tpc_offset += mmTPC1_QM_GLBL_CFG0 - mmTPC0_QM_GLBL_CFG0;
H A Dgaudi_security.c9177 pb_addr = (mmTPC0_QM_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS;
9178 word_offset = ((mmTPC0_QM_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2;
9179 mask = 1U << ((mmTPC0_QM_GLBL_CFG0 & 0x7F) >> 2);

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