Searched refs:mmTPC0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 (Results 1 - 3 of 3) sorted by relevance

/linux-master/drivers/accel/habanalabs/include/gaudi/asic_reg/
H A Dtpc0_qm_regs.h382 #define mmTPC0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 0xE082E0 macro
/linux-master/drivers/accel/habanalabs/gaudi/
H A Dgaudi.c3039 WREG32(mmTPC0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 + q_off,
3050 WREG32(mmTPC0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 + q_off,
H A Dgaudi_security.c9364 mask |= 1U << ((mmTPC0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);

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