Searched refs:mmSTLB_CACHE_INV_BASE_49_40 (Results 1 - 4 of 4) sorted by relevance

/linux-master/drivers/accel/habanalabs/include/goya/asic_reg/
H A Dstlb_regs.h26 #define mmSTLB_CACHE_INV_BASE_49_40 0x490018 macro
/linux-master/drivers/accel/habanalabs/include/gaudi/asic_reg/
H A Dstlb_regs.h26 #define mmSTLB_CACHE_INV_BASE_49_40 0xC12018 macro
/linux-master/drivers/accel/habanalabs/goya/
H A Dgoya.c2694 WREG32(mmSTLB_CACHE_INV_BASE_49_40, MMU_CACHE_MNG_ADDR >> 40);
/linux-master/drivers/accel/habanalabs/gaudi/
H A Dgaudi.c3666 WREG32(mmSTLB_CACHE_INV_BASE_49_40, prop->mmu_cache_mng_addr >> 40);

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