Searched refs:mmDMA0_QM_PQ_PI_0 (Results 1 - 3 of 3) sorted by relevance

/linux-master/drivers/accel/habanalabs/include/gaudi/asic_reg/
H A Ddma0_qm_regs.h96 #define mmDMA0_QM_PQ_PI_0 0x5080A0 macro
/linux-master/drivers/accel/habanalabs/gaudi/
H A Dgaudi.c2582 WREG32(mmDMA0_QM_PQ_PI_0 + q_off, 0);
2765 WREG32(mmDMA0_QM_PQ_PI_0 + q_off, 0);
4201 db_reg_offset = mmDMA0_QM_PQ_PI_0 + q_off;
4208 db_reg_offset = mmDMA0_QM_PQ_PI_0 + q_off;
4215 db_reg_offset = mmDMA0_QM_PQ_PI_0 + q_off;
4222 db_reg_offset = mmDMA0_QM_PQ_PI_0 + q_off;
4229 db_reg_offset = mmDMA0_QM_PQ_PI_0 + q_off;
4236 db_reg_offset = mmDMA0_QM_PQ_PI_0 + q_off;
4243 db_reg_offset = mmDMA0_QM_PQ_PI_0 + q_off;
4250 db_reg_offset = mmDMA0_QM_PQ_PI_0
[all...]
H A Dgaudi_security.c1556 mask |= 1U << ((mmDMA0_QM_PQ_PI_0 & 0x7F) >> 2);

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