Searched refs:mmDMA0_QM_CP_MSG_BASE2_ADDR_HI_0 (Results 1 - 3 of 3) sorted by relevance

/linux-master/drivers/accel/habanalabs/include/gaudi/asic_reg/
H A Ddma0_qm_regs.h342 #define mmDMA0_QM_CP_MSG_BASE2_ADDR_HI_0 0x50828C macro
/linux-master/drivers/accel/habanalabs/gaudi/
H A Dgaudi.c2596 WREG32(mmDMA0_QM_CP_MSG_BASE2_ADDR_HI_0 + q_off, mtr_base_ws_hi);
2823 WREG32(mmDMA0_QM_CP_MSG_BASE2_ADDR_HI_0 + q_off,
H A Dgaudi_security.c1679 mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);

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